Switching Controller Prefetching for Memory Access Latency Gaps
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Solution Overview
Problem
Computing systems experience degraded performance due to differences in access latency between memories located within and outside a device, including a processor, leading to inefficiencies in data processing.
Innovation Solution
A storage device equipped with a switching controller that includes a buffer memory and a buffer memory control module to select and store data from multiple storage blocks, and a routing module to manage data transmission, reducing latency by prefetching frequently accessed data to a buffer memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a memory is located outside the device including a processor, then the capacity of memory increases, but the access latency increases
Solution Approach 1:
The switching controller performs preliminary actions by prefetching data from external memory to internal buffer memory before the processor actually needs it. The controller monitors access patterns and proactively transfers frequently accessed data, so when the processor requests the data, it is already available in the buffer, eliminating the latency penalty of external memory access.
Solution Approach 2:
The switching controller acts as an intermediary between the processor and external memory. It includes internal buffer memory that serves as a middle layer, caching data from external memory and providing it to the processor at speeds closer to internal memory, thus mediating the speed mismatch between processor and external memory.
2Productivity
If multiple memories are used to improve data processing performance, then the memory capacity increases, but the difference in access latency between memories increases
Solution Approach 1:
The switching controller monitors access patterns to multiple memories and performs preliminary data transfer from external memories to internal buffers based on predicted access needs. By analyzing command patterns and prefetching data that is likely to be accessed soon, the system ensures that data from multiple memory sources is ready before needed, reducing latency differences.
Solution Approach 2:
The switching controller with its internal buffer memory serves as an intermediary layer between multiple external memories and the processor. It manages data from different memory sources, caching frequently accessed data in the buffer, and provides unified access to the processor, thereby harmonizing the access latency differences between multiple memory types.
3Productivity
If data is frequently accessed from external memory, then the data processing performance improves, but the access latency increases due to external memory location
Solution Approach 1:
The switching controller detects frequently accessed data patterns and performs preliminary transfer of such data from external memory to internal buffer memory. By monitoring access commands and identifying hot data, the controller proactively prefetches this data into the buffer, so subsequent accesses occur from the faster buffer rather than external memory, reducing latency for frequently accessed data.
Solution Approach 2:
The system applies different quality characteristics to different data based on access patterns. Frequently accessed data is cached in the internal buffer with faster access characteristics, while less frequently accessed data remains in external memory. The switching controller dynamically determines which data receives the 'local quality' of buffer storage based on access frequency and patterns.
Data Source
AI summary
A switching controller controlling communication between a processor included in an external device and a memory included in a storage device may pre-fetch memory data into a buffer memory inside the switching controller and provides the data to the processor of the external device based on a command input for a predetermined period.