Switching Converter Current Sensing With Dynamic Temperature Calibration
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Solution Overview
Problem
Existing temperature compensation techniques for Pulse Width Modulated (PWM) power converters are inefficient, power-consuming, and limited in bandwidth, especially at higher switching frequencies, often requiring external components and reducing system efficiency at lighter loads.
Innovation Solution
A system and method for dynamic calibration of current sense channels using a Zero Temperature Coefficient (ZTC) current source to adjust amplifier gains, minimizing error voltage and compensating for transistor temperature variations without external components, allowing for high-speed and accurate temperature compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external components are used for temperature compensation, then temperature compensation capability is improved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the temperature compensation function from external components and implements it using internal FETs and circuitry already present in the switching converter. The compensation is achieved by sensing temperature effects through the existing power FETs and using control circuitry to adjust their operation, eliminating the need for separate external temperature compensation components.
Solution Approach 2:
The patent makes the existing power FETs serve dual functions: their primary power switching function and a secondary temperature sensing function. By monitoring the voltage characteristics of these FETs during normal operation, the system extracts temperature information without requiring dedicated temperature sensors or external compensation components.
2Measurement precision
If sense FET topology is used for temperature compensation, then temperature compensation accuracy is improved, but bandwidth is reduced and efficiency decreases at higher switching frequencies
Solution Approach 1:
The patent uses periodic sampling of the FET voltage characteristics during normal switching operation to extract temperature information. By taking measurements at specific points in the switching cycle and processing these periodic samples, the system achieves accurate temperature compensation without introducing additional bandwidth limitations.
Solution Approach 2:
The patent replaces traditional sense FET topologies with a voltage sensing approach that uses the existing power FETs as temperature indicators. Instead of using separate sense FETs that limit bandwidth, the system measures voltage drops across the power FETs during normal operation, substituting a high-bandwidth electronic measurement approach for a lower-bandwidth sensing topology.
3Measurement precision
If sense current is increased to improve temperature sensing accuracy, then measurement precision is improved, but power loss increases at lighter loads
Solution Approach 1:
The patent uses the normal operating current through the power FETs to generate the voltage signals needed for temperature sensing. Instead of introducing separate sense currents that would cause additional power loss, the system exploits the voltage drops that naturally occur during normal FET operation, making the temperature sensing self-powered and lossless.
Solution Approach 2:
The patent changes the sensing parameter from current-based sensing to voltage-based sensing. By measuring voltage drops across the FETs during normal operation rather than introducing separate sense currents, the system achieves temperature sensing accuracy without the additional power losses that would occur at lighter loads from sense current injection.
Data Source
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AI summary
A method for dynamic calibration of current sense for switching converters includes biasing a reference transistor with a Zero Temperature Coefficient current source, and a respective gate of each of the reference transistor and a power transistor with a gate voltage. The reference transistor and the power transistor each comprise a matching temperature coefficient. A reference voltage sensed across the reference transistor is multiplied by a gain, thereby generating a first calibration voltage, wherein the gain is determined by a gain coefficient. A transistor voltage sensed across the power transistor is multiplied by the gain, thereby generating a second calibration voltage. The first calibration voltage is compared to a target voltage to generate an error voltage. The gain coefficient is determined with an Analog to Digital Converter in response to the error voltage, thereby minimizing a difference between the target voltage and each of the calibration voltages.