Switching Device Multi-Layer Channel Routing Parasitic Capacitance

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Solution Overview

Problem

In multi-input and multi-output (MIMO) wireless communication systems, the increase in the number of input and output terminals leads to wire intersections in metal layers, resulting in parasitic capacitance and increased insertion loss due to signal power decrease.

Innovation Solution

The switching device is designed with channels intersecting on different layers, where one channel is on the first layer and another on the third layer, with no channels on the second layer at the intersection area, minimizing parasitic capacitance and reducing signal power loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of input terminals and output terminals is increased to support MIMO, then the device can simultaneously transmit and receive different data units through multiple channels, but the wires constituting the channels intersect in multiple metal layers causing parasitic capacitance and increased insertion loss

Engineering Contradiction:
ImproveMIMO capabilityVSAvoidinsertion loss
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies dimensionality change by routing channels through different metal layers (first layer, second layer, third layer) to avoid planar intersections. Specifically, when channels must cross, one channel is routed on the first metal layer while another channel crosses on the third metal layer, utilizing the vertical dimension to eliminate harmful parasitic capacitance from lateral wire intersections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Length of stationary object

If wires are routed to a shared node with equal length, then the distance between the shared node and each terminal is minimized, but this configuration becomes impossible when multiple channels need to connect multiple input and output terminals simultaneously

Engineering Contradiction:
Improvewire lengthVSAvoidchannel connectivity
Core Design Contradiction:
Length of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent extends the routing space from two-dimensional planar routing to three-dimensional multi-layer routing. Channels can traverse vertically between metal layers to reach different terminals, enabling flexible connectivity configurations that would be impossible in a single plane while maintaining reasonable path lengths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the routing path into multiple layers, allowing different portions of channels to reside on different metal layers. This segmentation enables independent optimization of each channel's path and avoids the constraints of planar routing when connecting multiple terminals.

Inventive Principle:
Principle #1Segmentation

3Length of stationary object

If channels are routed on adjacent metal layers to minimize distance, then the channel length is reduced, but parasitic capacitance increases due to closer proximity between layers

Engineering Contradiction:
Improvechannel lengthVSAvoidparasitic capacitance
Core Design Contradiction:
Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary metal layer (second layer) that acts as a buffer between channels routed on the first and third layers. When channels must cross, they are separated by this intermediate layer, which reduces the electric field coupling and parasitic capacitance between the signal-carrying channels while still allowing efficient vertical transitions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10971448B2Switching device
Publication Date: 2021.04.06 MURATA MFG CO LTD
  • US10971448B2 patent drawing
  • US10971448B2 patent drawing
  • US10971448B2 patent drawing

AI summary

A switching device includes first to third layers laminated in sequence above a principal surface of a substrate, a plurality of input terminals, a plurality of output terminals, a plurality of switching circuits, and a plurality of channels. Each of the channels electrically connecting one of the plurality of input terminals and one of the plurality of output terminals with one of the plurality of switching circuits interposed therebetween. The plurality of channels include a first channel and a second channel that intersect with each other when the principal surface of the substrate is seen in a plan view. In an intersection area where the first and second channels intersect with each other, the first channel is disposed on the first layer, the second channel is disposed on the third layer, and none of the plurality of channels is disposed on the second layer.