Switching Element With Impurity-Doped Layer For Electric Field Dispersion
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Solution Overview
Problem
Conventional switching elements with nitride semiconductors face destruction under high voltage due to intense electric fields in the off state and reduced mobility due to impurity doping, leading to insufficient drain current in the on state.
Innovation Solution
A switching element with a heterojunction structure and an impurity-doped third semiconductor layer between the first and second electrodes, where the impurity-doped layer forms a high-resistance depletion region in the off state to disperse the electric field and maintains low on-resistance by allowing carrier supply through the two-dimensional carrier gas layer in the on state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If impurity doping is applied to increase breakdown voltage, then reliability under high voltage is improved, but electron mobility deteriorates leading to insufficient drain current
Solution Approach 1:
The patent applies local quality by creating a selectively doped region (third semiconductor layer) only in specific areas where high voltage stress occurs, rather than uniformly doping the entire structure. This localized doping approach allows the doped region to provide breakdown voltage resistance while leaving other regions undoped to maintain high electron mobility and sufficient drain current.
Solution Approach 2:
The patent segments the semiconductor structure into distinct functional layers: undoped first and second semiconductor layers that maintain high mobility for current conduction, and a selectively doped third semiconductor layer that provides breakdown voltage resistance. This segmentation allows each layer to optimize its specific function without compromising the overall device performance.
2Ease of operation
If electric field concentration occurs at gate electrode to enable switching, then switching control is improved, but element destruction risk increases under high voltage
Solution Approach 1:
The patent introduces a third semiconductor layer as an intermediary between the gate electrode and the drain electrode. This intermediate layer acts as a mediator that modifies the electric field distribution, preventing direct concentration of high electric field at the gate electrode while still allowing effective switching control through the two-dimensional electron gas layer formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents destruction under high voltage in the off state while ensuring sufficient drain current in the on state by dispersing the electric field and maintaining low on-resistance.
Implementation Method 1
a two-dimensional electron gas layer having a high concentration of 1×1013 cm−2 is generated in an interface of GaN/AlGaN due to polarization by a piezo effect caused by lattice mismatch of AlGaN and GaN, in addition to spontaneous polarization caused by an asymmetric structure in a c-axis direction of a crystal structure (wurtzite structure) of GaN
Implementation Method 2
polarization by a piezo effect caused by lattice mismatch of AlGaN and GaN
Implementation Method 3
a third semiconductor layer is formed in a predetermined first region on or above the upper surface of the first semiconductor layer by doping an impurity having the same conductivity type as a carrier constituting the two-dimensional carrier gas layer... a high-resistance depletion region is formed in the third semiconductor layer
Data Source
AI summary
Provided is a switching element that is hardly destroyed even under a high bias condition in an off state because an electric field near a gate electrode is relaxed. A switching element 1 includes a carrier transit layer 13, a carrier supply layer 14 formed on an upper surface of the carrier transit layer 13, having a wider bandgap than the carrier transit layer 13, and forming a heterojunction with the carrier transit layer 13, a source electrode 15, a drain electrode 16, and a gate electrode 17 arranged between the source electrode 15 and the drain electrode 16. An impurity-doped layer 20 is interposed between the carrier transit layer 13 and the drain electrode 16. The impurity-doped layer 20 is formed as a semiconductor layer by heavily doping an impurity having the same conductivity type as a carrier constituting a two-dimensional carrier gas layer 18 generated due to the heterojunction, and a depletion layer 23b is formed in the impurity-doped layer 20 when the switching element 1 is in the off state, and thereby a high electric field generated near the gate electrode 17 is dispersed.