Switching Regulator Clamp Circuit PFM to PWM Transition
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Solution Overview
Problem
The existing switching regulators experience a significant drop in output voltage when there is a sudden increase in load current during PFM operation due to the delay in transitioning from PFM to PWM mode, caused by the error voltage taking time to rise from 0V to exceed the reference voltage.
Innovation Solution
A clamp circuit is introduced to set a lower limit for the error voltage, clamping it to a voltage obtained by subtracting a prescribed voltage from the reference voltage, allowing for quicker transition from PFM to PWM operation by setting the lower limit closer to the reference voltage, thus reducing the delay and output voltage drop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the gain of the error amplification circuit is set very large to improve power conversion efficiency during PFM operation, then the error voltage reduces to 0V and delay occurs until the error voltage exceeds the reference voltage, but this causes significant output voltage drop when load current suddenly increases
Solution Approach 1:
The clamp circuit pre-establishes a lower limit voltage (e.g., 0.7V) for the error voltage during PFM operation, so that when load current suddenly increases, the error voltage only needs to rise from this pre-set level rather than from 0V, significantly reducing the transition delay time to PWM operation
2Loss of energy
If the error voltage is allowed to reach 0V during PFM operation to enhance efficiency, then power conversion efficiency is improved, but the transition response to sudden load current increase becomes slow
Solution Approach 1:
The clamp circuit changes the parameter of error voltage by imposing a lower limit voltage threshold during PFM operation. This modifies the voltage range within which the error voltage operates, preventing it from reaching 0V and instead maintaining it above a predetermined level, thereby improving transition response speed while preserving efficiency benefits
Data Source
AI summary
A switching regulator includes a switching element, a first error amplification circuit amplifying a difference between a voltage based on an output voltage and a first reference voltage and providing a first error voltage, a clamp circuit generating a second error voltage at an output node based on the first error voltage and a second reference voltage, a PFM comparison circuit comparing the second error voltage and the second reference voltage to output a comparison result, an oscillation circuit providing and stopping a clock signal according to the comparison result, and a PWM conversion circuit turning on/off the switching element based on the second error voltage and the output of the oscillation circuit. The clamp circuit clamps a lower limit value of the second error voltage to a voltage obtained by subtracting a prescribed voltage from the second reference voltage.