Switching Regulator Control Circuit Anti-Latch-Up Design
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Solution Overview
Problem
Switching regulators face issues with parasitic transistor latch-up effects and prolonged reverse recovery times, especially during light load conditions, which can damage the regulator and reduce efficiency.
Innovation Solution
A control circuit and method that generates adjustment signals to switch between a reverse recovery level and an anti-latch-up level, connected to the isolation region of the low-side switch, to prevent latch-up and reduce reverse recovery time by adjusting the electrical level during dead times based on inductor current and signal states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dead time is introduced to prevent overlap between high-side and low-side switch ON-times, then switch safety is improved, but parasitic transistor latch-up effect occurs during light load conditions
Solution Approach 1:
The patent introduces an adjustment level signal as an intermediary to control the isolation region of the low-side switch during dead time. This adjustment level prevents the parasitic transistor latch-up effect by manipulating the electrical potential of the isolation region, thereby resolving the harmful effect without eliminating the necessary dead time for switch safety.
Solution Approach 2:
The patent changes the electrical parameter (adjustment level) of the low-side switch isolation region during dead time to prevent latch-up. By dynamically adjusting the voltage level of the isolation region based on switch state and current direction, the patent eliminates the conditions that cause parasitic transistor activation while maintaining the dead time structure.
2Speed
If adjustment level is lowered to reduce reverse recovery time of parasitic diode, then switching speed is improved, but parasitic transistor latch-up effect may occur
Solution Approach 1:
The patent dynamically adjusts the adjustment level of the low-side switch isolation region based on real-time conditions (switch state, current direction, and timing). The adjustment level transitions between different voltage states during dead time, allowing the system to optimize reverse recovery speed while preventing latch-up through conditional parameter modification.
Solution Approach 2:
The patent applies preliminary action by pre-setting the adjustment level of the isolation region before the parasitic diode reverse recovery completes. By controlling the isolation region voltage in advance during dead time, the patent accelerates reverse recovery while simultaneously preventing the voltage conditions that would trigger parasitic transistor latch-up.
3Loss of energy
If inductor current is allowed to ring around zero during light load, then power efficiency is improved, but parasitic transistor latch-up effect is triggered
Solution Approach 1:
The patent employs feedback by monitoring the inductor current direction and the state of high-side and low-side switches to dynamically control the adjustment level. This feedback mechanism allows the system to maintain efficient light-load operation with current ringing while detecting and preventing the specific conditions that would cause parasitic transistor latch-up.
Solution Approach 2:
The patent applies local quality by targeting the specific region (isolation region of low-side switch) that causes the latch-up problem, rather than modifying the entire circuit operation. By locally adjusting the electrical potential of the isolation region during dead time, the patent preserves the beneficial light-load current ringing while eliminating the harmful latch-up effect in the specific problematic area.
Data Source
AI summary
A switching regulator includes a power stage circuit and a control circuit. The power stage circuit operates a high-side switch and a low-side switch therein according to a high-side signal and a low-side signal respectively to generate an inductor current flowing through an inductor therein. The adjustment signal generation circuit in the control circuit generates an adjustment level according to the high-side signal, the low-side signal, and/or the inductor current, wherein the adjustment level is switched between a reverse recovery level and an anti-latch-up level, and is electrically connected to a low-side isolation region of the low-side switch. The reverse recovery level is lower than the input voltage. The anti-latch-up level is higher than the reverse recovery level to avoid a latch-up effect.