Switching Regulator Adaptive Frequency Foldback Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Switching power supplies face challenges in maintaining output voltage and current control during abnormal conditions such as high input voltage, shorted output, and light load, due to their fixed switching frequency, which can lead to loss of regulation and potential safety hazards.

Innovation Solution

A control method that dynamically reduces the switching frequency of a switching regulator when a minimum pulsewidth violation is detected, allowing for effective control during abnormal conditions, and restores the original frequency as conditions normalize, thereby minimizing output ripple voltage and ensuring reliable operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed switching frequency is used, then predictable EMI performance is achieved, but loss of output voltage or current control occurs under abnormal conditions

Engineering Contradiction:
Improveoutput voltage controlVSAvoidfrequency adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic frequency adjustment by monitoring the power switch current and comparing it against expected values. When abnormal conditions are detected (such as current exceeding expected values by a threshold), the switching frequency is automatically reduced. This dynamic adaptation allows the system to maintain control reliability under varying operating conditions while avoiding the fixed frequency limitations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the switching frequency parameter in response to detected abnormal conditions. By monitoring current waveforms and detecting deviations from expected patterns, the controller adjusts the frequency parameter to prevent loss of regulation. This parameter change enables the system to adapt to high input voltage, shorted outputs, and light load conditions without sacrificing control reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the switching frequency is reduced to maintain control during abnormal conditions, then output voltage control is maintained, but output ripple voltage increases

Engineering Contradiction:
Improveoutput voltage controlVSAvoidoutput ripple voltage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies partial frequency reduction rather than complete frequency collapse. When abnormal conditions are detected, the frequency is reduced only to the extent necessary to maintain control, not reduced maximally. This partial action approach maintains sufficient control authority while minimizing the increase in output ripple voltage that would result from excessive frequency reduction.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system continuously monitors the power switch current and compares it against expected values to detect abnormal conditions. This feedback mechanism allows the controller to adjust the switching frequency in real-time, reducing frequency only when and to the extent that control is at risk, thereby minimizing unnecessary ripple voltage increases while maintaining output voltage control reliability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8723501B2Switching regulator device and method with adaptive frequency foldback
Publication Date: 2014.05.13 SEMICON COMPONENTS IND LLC
  • US8723501B2 patent drawing
  • US8723501B2 patent drawing
  • US8723501B2 patent drawing

AI summary

A control circuit for a switching regulator includes a clock circuit, a pulsewidth modulation (PWM) circuit, and a reduction monitor. The clock circuit provides a clock signal at a variable frequency. The PWM circuit produces a drive signal of at least a first predetermined duration once every period of the clock signal. The reduction monitor controls the clock circuit to reduce the variable frequency in response to a sense signal that indicates that at least one of a voltage and a current is outside a limit during the first predetermined duration of said drive signal.