Switching Regulator Control Circuit Shortens Minimum Pulse Width
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Solution Overview
Problem
Conventional PWM control methods in switching regulator control circuits are unable to sufficiently shorten the minimum pulse width or on-time of the switching signal, limiting the range of input voltages that can be stepped down to a target output voltage in step-down switching regulators.
Innovation Solution
A switching regulator control circuit that includes a slope voltage generator, error amplifier, first comparator, and latch portion, with a delay portion to adjust the timing of the latch setting relative to the slope voltage's start, allowing for current-mode control and reducing the minimum pulse width of the switching signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional PWM control method is used in a switching regulator control circuit, then the control circuit structure is simple, but the minimum pulse width (on-time) of the switching signal cannot be sufficiently shortened
Solution Approach 1:
The patent divides the control circuit into distinct functional modules: a slope voltage generation unit that generates a slope voltage signal, a comparison unit that compares the slope voltage with an error signal, and a latch unit that generates the PWM output. This segmentation allows independent optimization of each module to achieve shorter minimum pulse widths while maintaining overall circuit functionality.
Solution Approach 2:
The patent implements preliminary action by generating the slope voltage signal in advance during a predetermined period before the PWM switching cycle begins. This allows the slope voltage to be ready and stabilized before comparison with the error signal, enabling faster response and shorter minimum on-time without requiring complex ramp-up circuits during the active switching period.
2Adaptability or versatility
If the minimum on-time of the switching signal is shortened, then the range of input voltages that can be stepped down to a target output voltage can be increased, but the control precision and stability may deteriorate
Solution Approach 1:
The patent employs parameter changes by utilizing a slope voltage that linearly increases over time with a controlled slope rate. By adjusting the slope voltage generation parameters (such as the discharge current of the capacitor), the circuit can adapt to different input voltage conditions while maintaining stable PWM control. The error amplifier dynamically adjusts the error signal based on the difference between output voltage and reference voltage, ensuring control precision across a wide input voltage range.
Solution Approach 2:
The patent implements feedback through an error amplifier that continuously monitors the output voltage and compares it with a reference voltage. The resulting error signal is fed back to the comparison unit, which adjusts the PWM duty cycle to maintain stable output voltage. This feedback mechanism ensures control stability and precision even when the minimum on-time is shortened and the input voltage range is expanded.
Data Source
Figure 1
Figure 2
Figure 3~4
AI summary
A switching regulator control circuit, having: a slope circuit 3 for generating a slope voltage VSLP on the basis of a clock signal CLK of a prescribed frequency; an error amplifier 1 for generating an error signal Vc corresponding to the difference between a reference voltage VREF and a voltage VFB corresponding to the output voltage of a switching regulator; a comparator 4 for comparing the error signal Vc and the slope voltage VSLP; and an RS flip-flop 6 set on the basis of the clock signal CLK and reset by a signal outputted by the comparator 4. The timing at which the RS flip-flop 6 is set is delayed with respect to the timing at which the sloping of the slope voltage VSLP is started.