Switching Regulator Quick-Start Circuit for Fast Power Mode Transition
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Solution Overview
Problem
Existing switching regulators face challenges in transitioning quickly from low-power to high-power modes due to the need for bias currents to stabilize, particularly affecting the operation of the error amplifier and current sense ramp circuits when load current increases rapidly.
Innovation Solution
Incorporation of a quick-start circuit and timer circuit to maintain and rapidly charge parasitic capacitors, ensuring the error amplifier and high-power comparator are ready for immediate operation upon mode transition, reducing the transition time by preventing discharge and stabilizing bias currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the switching regulator is in low-power mode to reduce quiescent current consumption, then energy efficiency is improved, but the transition time to high-power mode increases due to bias current stabilization requirements
Solution Approach 1:
The quick-start circuit performs preliminary charging of parasitic capacitors (C1, C2, C3) associated with the error amplifier and current sense ramp circuits before mode transition. This preliminary action ensures that when transitioning from low-power to high-power mode, the bias currents are already stabilized and ready for immediate operation, eliminating the delay that would normally occur during bias current stabilization.
2Speed
If the error amplifier and current sense ramp circuits are enabled in low-power mode, then transition speed is improved, but quiescent current consumption increases
Solution Approach 1:
The patent extracts and isolates the parasitic capacitors (C1, C2, C3) from the main error amplifier and current sense ramp circuits. These capacitors are connected to dedicated quick-start circuitry that can charge them independently without requiring the full error amplifier or current sense ramp circuits to be active. This allows the capacitors to be pre-charged during low-power mode without enabling the entire circuits, thus maintaining low quiescent current while preparing for fast transition.
3Device complexity
If the compensation capacitor is discharged through the error amplifier in low-power mode, then circuit simplicity is maintained, but transition performance deteriorates due to unstable bias currents
Solution Approach 1:
The patent introduces a first switch (SW1) as an intermediary element between the compensation capacitor and the error amplifier. This switch acts as a mediator that can selectively connect or disconnect the error amplifier from the compensation capacitor. During low-power mode, SW1 is opened to prevent discharge through the error amplifier, while during high-power mode, SW1 is closed to enable normal operation. This intermediary switch resolves the conflict by providing conditional connectivity based on operational mode.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Facilitates a faster transition between power modes, maintaining stable output voltage during load current changes, and reducing quiescent current consumption, especially in nano-amp low-power mode.
Implementation Method 1
a quick-start circuit coupled to the controller; wherein the quick-start circuit is configured to charge a set of capacitors when the switching regulator is in the low-power mode
Implementation Method 2
further comprising a timer circuit; wherein the timer circuit is configured to periodically charge the compensation capacitor (CC) to a preset voltage during the low-power mode
Data Source
AI summary
One example discloses a switching regulator circuit, comprising: a power supply input (Vin); a voltage reference (Vref); a power output (Vout); a high-side switch coupled between the power supply input (Vin) and the power output (Vout); a low-side switch coupled between a ground reference (GND) and the power output (Vout); a driver circuit coupled to the high-side switch and the low-side switch; a low-power comparator (COMP1) coupled to receive the voltage reference (Vref) and the power output (Vout); a high-power comparator (COMP2) having a first input and a second input; wherein the first input is coupled to a compensation capacitor (CC) and a first switch (SW1); wherein the second input is coupled to a current sense ramp; wherein the current sense ramp is coupled to the power output (Vout).