Switching Transistor Gate Drive With Sense Terminal
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Switching transistors in switched mode power supplies (SMPS) experience high power dissipation due to high voltage across the transistor during switching, leading to reduced efficiency, as current flows through the transistor before the voltage decreases, causing significant energy loss.
Innovation Solution
The method involves adjusting the gate driving circuit and inductively loaded switching transistor parameters to reduce the voltage across the transistor during turn-on, utilizing a separate sense terminal and load path terminal, and optimizing the capacitance ratios to achieve Quasi-Zero-Voltage-Switching (QZVS) mode, where the drain-source voltage reaches zero or a minimum before full load current is achieved, thereby minimizing power dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional switching transistor operation is used, then the transistor can conduct current and block voltage, but high power dissipation occurs due to high voltage across the transistor during switching
Solution Approach 1:
The patent applies preliminary action by using a separate sense terminal to detect voltage changes and trigger gate drive signals before the main switching action occurs. The sense terminal monitors the drain-source voltage and generates a gate drive signal that turns on the transistor in advance, allowing the voltage to drop before significant current flows, thereby reducing power dissipation during the switching transition.
Solution Approach 2:
The patent introduces an intermediary sense terminal that acts as a mediator between the main circuit terminals and the gate drive circuit. This sense terminal provides isolated voltage sensing and triggers the switching action through a gate drive signal, enabling controlled turn-on that reduces voltage across the transistor during current conduction and minimizes power loss.
2Speed
If the transistor is turned on quickly to improve switching speed, then productivity increases, but power dissipation increases due to high voltage during the transition
Solution Approach 1:
The sense terminal detects voltage changes and triggers the gate drive signal in advance, allowing the transistor to begin turning on before the full voltage is applied. This preliminary action enables faster switching by pre-charging the gate capacitance, while the controlled turn-on ensures voltage drops before current increases, reducing power dissipation during the transition.
Solution Approach 2:
The sense terminal provides feedback about the voltage state to the gate drive circuit, enabling the gate drive to adjust its signal timing and magnitude based on actual voltage conditions. This feedback mechanism optimizes the switching speed by triggering the turn-on at the optimal moment while controlling the rate of change to minimize power dissipation during the transition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces power dissipation across the switching transistor, enhancing the efficiency of SMPS by minimizing energy loss during switching operations, particularly in hard switching applications.
Implementation Method 1
turning on the semiconductor switch by applying a turn-on voltage to between a gate of the semiconductor switch and a low current terminal
Implementation Method 2
power conversion is performed by controlled charging and discharging of the inductor or transformer
Data Source
AI summary
In accordance with an embodiment, a method of operating a semiconductor switch coupled to an inductor includes turning on the semiconductor switch by applying a turn-on voltage to between a gate of the semiconductor switch and a low current terminal connected to a reference node of the semiconductor switch, the low current terminal separate from a high current reference terminal connected to the reference node of the semiconductor switch, and the semiconductor switch comprises a first input capacitance to transconductance ratio. The method further includes turning off the semiconductor switch by applying a turn-off voltage to the gate of the semiconductor switch, wherein a ratio of a total capacitance at an output node of the semiconductor switch to a gate-drain capacitance is greater than a first ratio per watt of power being handled by a load coupled to the semiconductor switch.