Symbol Clock Regeneration Without Synchronization Words

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing symbol clock regeneration methods rely on frame synchronization words, making it difficult to determine symbol clock deviations and correct the symbol clock accurately, especially when accurate clock timing is not acquired during detection processes.

Innovation Solution

A symbol clock regenerating apparatus that acquires symbol values at a sampling timing with a frequency multiple times that of the symbol clock, using arithmetic operations and buffer storage to detect symbol timing independently of synchronization words, allowing for accurate symbol clock regeneration without relying on frame synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If frame synchronization words are used for symbol timing detection, then the symbol clock can be regenerated, but the system cannot determine symbol clock deviations until synchronization words are detected

Engineering Contradiction:
Improvesymbol clock regeneration reliabilityVSAvoidtime to detect symbol clock deviation
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary symbol timing detection using multiple sampling points per symbol period before final symbol clock regeneration. By detecting timing deviations at multiple points (e.g., 3 or more samples per symbol) and performing preliminary correction, the system can identify and correct symbol clock deviations earlier, without waiting for frame synchronization words. This preliminary action reduces the time loss in detecting symbol clock deviations.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If multiple sampling points per symbol period are used for timing detection, then symbol timing can be detected more accurately, but the processing complexity increases

Engineering Contradiction:
Improvesymbol timing detection precisionVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the symbol period into multiple sampling points (m≥3 samples per symbol period). By dividing the detection process into discrete sampling points and evaluating timing deviation at each point, the system achieves higher measurement precision. The segmentation allows independent analysis of timing deviations at different phases of the symbol, improving overall detection accuracy while managing complexity through structured processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary processing stage that calculates timing deviation based on multiple sampling points and generates a correction signal. This intermediary step acts as a mediator between raw sampling data and final symbol clock regeneration, simplifying the overall processing by creating an intermediate representation of timing deviation that can be more easily corrected.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If synchronous follow-up using VCO is implemented, then the symbol clock can be corrected to follow symbol timing, but the system requires complex feedback control mechanisms

Engineering Contradiction:
Improvesymbol clock synchronization reliabilityVSAvoidfeedback control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements feedback control by detecting symbol timing deviation and generating a correction signal that adjusts the symbol clock frequency. The system continuously monitors timing deviation and applies corrective feedback to keep the symbol clock synchronized. This feedback mechanism ensures reliable synchronization while the patent simplifies the implementation by using direct timing deviation measurement from multiple sampling points rather than complex phase-locked loops.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7480359B2Symbol clock regenerating apparatus, symbol clock regenerating program and symbol clock regenerating method
Publication Date: 2009.01.20 JVC KENWOOD CORP
  • US7480359B2 patent drawing
  • US7480359B2 patent drawing
  • US7480359B2 patent drawing

AI summary

To provide a technique for regenerating a symbol clock based on a digital modulation signal in which the symbol timing is accurately detected without need of using a synchronization word.A symbol clock regenerating apparatus comprises symbol value acquisition means 1, 2 for acquiring a symbol value at a sampling timing with a sampling clock having a frequency m times (m is an integer of 3 or greater) that of a symbol clock to be regenerated, based on a digital modulation signal, arithmetic operation means 4 for calculating an arithmetic operation value indicating whether or not each symbol value sequentially acquired is the same as the preceding symbol value, buffer means 4 for sequentially storing each arithmetic operation value sequentially calculated in a buffer of n rows (n is an integer of one or greater) and m columns, and timing detection means 7 for detecting the symbol timing based on the sampling timing corresponding to each column of the buffer and the arithmetic operation values accumulated in the buffer.