Symbol Interleaving Layout for Fading-Resistant MIMO Transmission

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Solution Overview

Problem

Existing communication systems face challenges in suppressing error rate performance degradation due to fading, particularly in multi-antenna transmissions, where high-speed data transmission is required with low computational complexity, and conventional bit interleaving methods are inadequate for mobile terminals.

Innovation Solution

A transmitting method and apparatus that perform encoding and modulation using convolutional encoding with multiple coding rates, and bit interleaving is achieved through a configuration with a mapping section and symbol interleaver, allowing for high-speed operation with reduced computational complexity by arranging encoded data across multiple symbols and using different coding rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional bit interleaving methods are used in multi-antenna transmissions, then error correction capability is improved, but device complexity increases and high-speed operation becomes difficult

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the bit interleaving process into two distinct stages: intra-symbol bit interleaving (rearranging bits within each symbol) and inter-symbol bit interleaving (rearranging bits across different symbols). This segmentation allows each stage to be implemented with simpler, more efficient algorithms suitable for high-speed operation in mobile terminals while maintaining robust error correction capability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic switching between different interleaving methods based on channel conditions and transmission requirements. The system can adaptively select between intra-symbol only, inter-symbol only, or combined interleaving approaches, enabling optimization of both computational complexity and error correction performance according to actual operating conditions

Inventive Principle:
Principle #15Dynamics

2Reliability

If LDPC encoding with large block units is used, then resilience to burst errors is improved, but transmission time increases

Engineering Contradiction:
Improveresilience to burst errorsVSAvoidtransmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extends error protection from the traditional single-dimension (time or frequency) approach to two dimensions by implementing interleaving across both time (inter-symbol) and frequency (intra-symbol) domains. This two-dimensional interleaving structure allows the system to maintain resilience against burst errors while reducing the effective block size, thereby decreasing transmission time

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If multi-antenna transmission is implemented for high data transmission speed, then productivity is improved, but susceptibility to frequency selective fading increases

Engineering Contradiction:
Improvedata transmission speedVSAvoidsusceptibility to frequency selective fading
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the multi-antenna transmission signal into multiple independently interleaved streams, where each antenna's signal undergoes separate intra-symbol and inter-symbol interleaving. This segmentation diversifies the impact of frequency selective fading across different streams, preventing any single fading notch from affecting all antennas simultaneously and thereby maintaining high data transmission speed with improved reliability

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9712280B2Output signal generating method, decoded data generating method, output signal generating apparatus, and decoded data generating apparatus
Publication Date: 2017.07.18 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US9712280B2 patent drawing
  • US9712280B2 patent drawing
  • US9712280B2 patent drawing

AI summary

A transmitter apparatus wherein a simple structure is used to successfully suppress the degradation of error rate performance that otherwise would be caused by fading or the like. There are included encoding parts that encode transport data; a mapping part that performs such a mapping that encoded data sequentially formed by the encoding parts are not successively included in the same symbol, thereby forming data symbols; and a symbol interleaver that interleaves the data symbols. In this way, a low computational complexity can be used to perform an interleaving process equivalent to a bit interleaving process to effectively improve the reception quality at a receiving end.