Multilevel Transmission Encoding for Run Length and DC Balance
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Solution Overview
Problem
Multilevel modulation systems, such as those using four-level modulation, fail to guarantee run length and DC balance, leading to issues with clock recovery and data demodulation in reception devices, as they do not limit the consecutive occurrences of identical values and can result in DC offset.
Innovation Solution
A transmission device that separates data into multiple sequences, applies encoding to limit consecutive identical values, and uses an inversion control unit to determine whether to invert or not invert specific data sequences based on cumulative disparities, ensuring that each amplitude-modulated symbol has a bit from the specific sequence as its most significant bit and maintains DC balance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 8B/10B encoding is used for two-level modulation, then run length and DC balance are guaranteed, but the encoding system cannot be applied to multilevel modulation with more than two modulation conditions
Solution Approach 1:
The data sequence is divided into multiple segments (first data sequence and second data sequence), where the first data sequence undergoes encoding to guarantee run length, while the second data sequence remains unencoded. This segmentation allows the system to maintain run length guarantees while adapting to multilevel modulation requirements.
Solution Approach 2:
Different encoding treatments are applied to different parts of the data sequence. Specifically, the first data sequence (certain bits) receives encoding processing to ensure run length constraints are met, while the second data sequence (other bits) does not receive encoding processing, allowing flexibility for multilevel modulation.
2Productivity
If encoded bit sequence is used in multilevel modulation, then data transmission is possible, but run length guarantee is lost causing clock recovery failure
Solution Approach 1:
The transmitted signal is segmented into multiple components derived from different data sequences. The first data sequence is encoded to guarantee run length for clock recovery, while the second data sequence is used for additional data transmission capacity in multilevel modulation.
Solution Approach 2:
Instead of encoding all data sequences (which would lose run length guarantee in multilevel modulation), the invention inverts the approach by encoding only the necessary first data sequence while leaving the second data sequence unencoded, thereby maintaining run length guarantees for clock recovery while enabling multilevel modulation.
3Device complexity
If DC balance is not guaranteed in multilevel modulation, then circuit complexity is reduced, but DC offset causes identification level changes making demodulation impossible
Solution Approach 1:
The data sequences are segmented such that the first data sequence is encoded to guarantee DC balance while the second data sequence remains unencoded. This segmentation enables DC balance guarantee without requiring complex DC offset compensation circuits in the receiver.
Data Source
AI summary
The present invention aims to provide a transmission device that, in a communication system using multilevel modulation with 2^n levels (n being an integer greater than or equal to two), limits the run length to a predetermined value or less and guarantees DC balance.The transmission device, which transmits data to which 2^n amplitude modulation has been applied, separates data for transmission into n data sequences; encodes one of the n data sequences to guarantee run length, thereby generating a converted data sequence; generates an intermediate data sequence by either inverting or not inverting a specific data sequence so that, based on candidate data, the next output voltage guarantees DC balance; and applies 2^n amplitude modulation to n-bit symbols each of which has a bit in the intermediate data sequence as a most significant bit and bits in the remaining data sequences, excluding the specific data sequence, as subsequent bits.