Interconnect Symbol Stream FEC with Reed-Solomon Interleaving
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Solution Overview
Problem
High-speed serial interconnects, such as DisplayPort, face challenges in error correction, especially when dealing with compressed symbol streams, where random bit errors can corrupt entire frames, which is unacceptable for many implementations.
Innovation Solution
The implementation of forward error correction (FEC) techniques, specifically using Reed-Solomon encoding and symbol interleaving, to add redundancy to the symbol stream, enabling detection and correction of bit errors in fully formed symbol streams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If forward error correction (FEC) techniques are implemented to detect and correct bit errors in compressed symbol streams, then data integrity and reliability are improved, but device complexity and processing overhead increase
Solution Approach 1:
The patent applies Reed-Solomon encoding in advance to the symbol stream before transmission, adding redundancy symbols that enable error correction without requiring complex real-time processing at the receiver. The encoder pre-processes the data by generating check symbols according to the RS(n,k) code parameters, so that when errors occur during transmission, the receiver can use these pre-computed redundancy symbols to correct errors without needing complex iterative algorithms.
Solution Approach 2:
The patent introduces an intermediate FEC processing layer between the symbol stream and transmission medium. This intermediary component (the RS encoder/decoder) acts as a mediator that adds error correction capability without requiring fundamental changes to the existing DisplayPort architecture. The intermediary handles the complex mathematical operations of Reed-Solomon coding, isolating the complexity from the main transmission and reception pathways.
2Reliability
If Reed-Solomon encoding is applied to fully formed symbol streams, then error correction capability is improved, but bandwidth efficiency decreases due to added redundancy
Solution Approach 1:
The patent employs configurable Reed-Solomon code parameters RS(n,k) where different values of n (block size) and k (data symbols) can be selected based on the specific application requirements. This allows optimization of the redundancy ratio to achieve the desired error correction capability while minimizing bandwidth overhead. For example, RS(255,223) provides correction of up to 16 errors per block with 12.5% overhead, while RS(255,239) corrects 8 errors with 7.5% overhead, allowing flexible trade-off between reliability and bandwidth efficiency.
Data Source
AI summary
Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.