Symmetric Addressing for HPC Node Overhead Reduction
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Solution Overview
Problem
High-performance computing (HPC) systems face significant overheads due to remapping operations across numerous address spaces in a network of nodes, leading to inefficiencies in address range management.
Innovation Solution
Implementing a symmetric addressing system that identifies and aggregates free and busy address ranges across multiple address spaces, using collector and aggregator circuitry to create a common busy-free map, allowing tasks to utilize a common address range efficiently and enabling concurrent address space allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If remapping operations are performed in traditional HPC systems with many address spaces and nodes, then address range management can be achieved, but system overhead becomes relatively high
Solution Approach 1:
The patent merges address range management across multiple address spaces by identifying and aggregating common busy and free address ranges. Instead of managing address ranges independently in each address space, the system combines them into a unified view, allowing symmetric allocation that reduces redundant remapping operations and lowers system overhead while maintaining efficient address range management across all address spaces
Solution Approach 2:
The patent creates a universal address range management mechanism that operates across multiple address spaces and nodes simultaneously. The busy-free map aggregation system provides a multi-functional solution that serves all address spaces with a common address allocation strategy, enabling the system to handle address management for diverse workloads through a single coordinated approach rather than separate management for each address space
2Reliability
If address ranges are allocated independently in each address space, then address space isolation is maintained, but remapping overhead increases significantly
Solution Approach 1:
The patent performs preliminary aggregation of busy and free address ranges across all address spaces before allocation decisions are made. By pre-computing the common busy-free map that identifies overlapping free ranges and conflicting busy ranges, the system prepares allocation information in advance, allowing address ranges to be allocated symmetrically across multiple address spaces without requiring time-consuming remapping operations during runtime
Solution Approach 2:
The patent introduces a busy-free map aggregation mechanism as an intermediary layer between address space allocation requests and physical address mapping. This intermediary consolidates address range information from multiple address spaces, identifies compatible ranges for symmetric allocation, and provides coordinated allocation decisions that maintain address space isolation while avoiding redundant remapping operations through the intermediary's centralized management
Data Source
AI summary
This disclosure describes, in one embodiment an apparatus. The apparatus includes a processor; a memory, an application, collector circuitry and aggregator circuitry. The memory is to store one or more tasks. The application is associated with the one or more tasks. The collector circuitry is to identify a local free address range in at least one address space. The aggregator circuitry is to provide address range data to a subgroup aggregator. The provided address range data includes at least one local free address range.