Symmetric Block Sparse Matrix-Vector Multiplication on GPU
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Solution Overview
Problem
Current methods for performing Sparse Matrix-Vector multiplication (SpMV) on GPUs are bandwidth-bound and inefficient, especially for large block sparse matrices, due to memory constraints and the need for atomic updates when leveraging symmetry, which slows down performance and limits the size of problems that can be solved efficiently.
Innovation Solution
The method involves rearranging the sparse matrix and input vector data to minimize memory requirements and eliminate the need for atomic updates by storing only the symmetric half of the matrix, using a combination of registers and shared memory to maintain coalesced memory access and reduce data transfer, and processing portions of the matrix on both GPU and CPU to leverage their combined performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the full symmetric matrix is stored in GPU memory, then the complete SpMV operation can be performed on the GPU, but the memory requirement increases significantly limiting the problem size
Solution Approach 1:
The patent extracts only the necessary symmetric half of the matrix (either upper or lower triangular portion) for storage in GPU memory, while the other half is computed on-demand during SpMV operations. This extraction reduces memory requirements by approximately half for symmetric matrices, enabling larger problems to be solved efficiently on GPU while maintaining computational performance.
2Reliability
If atomic updates are used to handle symmetric matrix elements, then correctness is maintained, but performance deteriorates due to synchronization overhead
Solution Approach 1:
The patent introduces an asymmetry in the computation approach by processing only the unique symmetric elements (one triangle of the matrix) and using transpose operations to handle the other elements. This asymmetric processing strategy eliminates the need for atomic updates and thread synchronization, thereby maintaining correctness while significantly improving computational performance by removing synchronization overhead.
3Productivity
If more data is cached in GPU memory, then bandwidth-bound performance improves, but the ability to solve larger problems is limited
Solution Approach 1:
The patent segments the symmetric matrix storage by keeping only the essential symmetric half in GPU memory while the remaining half is computed on-demand. This segmentation allows the system to maintain sufficient data in fast GPU memory for optimal bandwidth performance while being able to handle larger overall problem sizes that would require storing the complete matrix, thus resolving the trade-off between performance and problem size capability.
Data Source
AI summary
Embodiments of the present invention are directed to methods and systems for performing block sparse matrix-vector multiplications with improved efficiency through the use of a specific re-ordering the matrix data such that matrix symmetry can be exploited while simultaneously avoiding atomic memory operations or the need for inefficient memory operations in general. One disclosed method includes reordering the matrix data such that, for any column of non-transpose data, and for any row of transpose data simultaneously processed within a single thread-block on a GPU, all matrix elements update independent elements of the output vector. Using the method, the amount of data required to represent the sparse matrix can be reduced by as much as 50%, thereby doubling the effective performance on the GPU, and doubling the size of the matrix that can be accelerated by the GPU.