Symmetric ECO Base Cell Layout for Dense ASIC Logic Changes
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Solution Overview
Problem
Traditional engineering change order (ECO) methods for ASICs require excessive silicon area due to space restrictions and inefficient placement and interconnection of digital filler cells, leading to increased costs and reduced flexibility in implementing new functionalities.
Innovation Solution
A circuit base cell with a symmetric structure comprising PMOS and NMOS transistors on a semiconductor substrate, optimized for efficient placement and connection, allowing for flexible implementation of new logic functions without additional diffusion layers, thus matching the standard cell pitch for reduced area occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional ECO methods use supplementary logic spare cells or configurable filler cells, then new logic functionalities can be implemented after tape-out, but excessive silicon area is consumed due to space restrictions and inefficient placement
Solution Approach 1:
The invention segments the filler cell into two independent transistors (PMOS and NMOS) that can be independently configured. This segmentation allows each transistor to be selectively activated or deactivated through control terminals, enabling multiple logic functions (AND, OR, NAND, NOR, etc.) to be implemented within a single compact cell structure, thereby reducing the area required for ECO implementations.
Solution Approach 2:
The filler cell is designed as a universal structure that can implement multiple logic functions (AND, OR, NAND, NOR, INVERTER, buffer, etc.) by configuring the connectivity between the PMOS and NMOS transistors through control terminals. This multi-functionality eliminates the need for multiple dedicated spare cells, significantly reducing the silicon area required for ECO while maintaining full adaptability for implementing new functionalities.
2Ease of manufacture
If digital filler cells are placed according to standard grid pitch, then placement and routing can be performed using conventional CAD software, but the space between cells is wasted or requires multiple pitch multiples
Solution Approach 1:
The invention changes the key parameter of cell width by designing the filler cell with a width equal to one pitch unit (Pm), matching the minimum cell width in standard libraries. This parameter change allows the filler cell to align perfectly with the standard placement grid without requiring multiple pitch multiples or leaving wasted space, thereby improving area efficiency while maintaining compatibility with conventional CAD tools and placement algorithms.
3Adaptability or versatility
If multiple diffusion layers are added to implement ECO, then new logic elements can be created, but manufacturing complexity and cost increase
Solution Approach 1:
The invention performs preliminary action by pre-configuring the PMOS and NMOS transistors with control terminals and interconnection structures during the initial tape-out phase. The control terminals and switching mechanisms are built in advance, allowing logic functionality to be changed by reconfiguring existing connections rather than adding new diffusion layers. This preliminary preparation enables ECO implementation through simple routing changes without increasing manufacturing complexity.
Data Source
AI summary
A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell.