Symmetric Multi-Processor Clock Management for Thermal Optimization
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Solution Overview
Problem
Conventional symmetric multi-processors in mobile devices face performance degradation due to increased heat and power consumption, limiting their operational time, as they are unable to efficiently manage operating clock frequencies and core states based on workload and temperature.
Innovation Solution
A system-on-chip with a symmetric multi-processor that includes a clock management unit, state management unit, and temperature management unit, which dynamically adjusts the operating clock signal and core modes based on workload and temperature to differentially determine the maximum operating clock frequency, allowing cores to switch between high and low performance modes or become non-operational when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the maximum operating clock frequency is set to the maximum tolerance value, then processing performance is improved, but heat and power consumption increase, limiting operational time
Solution Approach 1:
The patent implements dynamic adjustment of operating clock frequency based on real-time temperature monitoring and workload assessment. The system transitions from a static maximum frequency setting to a dynamic control mechanism that adapts frequency levels according to thermal conditions and processing demands, thereby extending operational time while maintaining performance when needed.
Solution Approach 2:
The system changes the operating clock frequency parameter dynamically based on temperature and workload conditions. By adjusting this critical parameter in response to environmental and operational feedback, the system optimizes the balance between processing performance and thermal management, preventing excessive heat accumulation that would limit operational duration.
2Duration of action of moving object
If the maximum operating clock frequency is reduced to lower heat and power consumption, then operational time is extended, but processing performance degrades
Solution Approach 1:
The system dynamically adjusts clock frequency based on actual workload requirements rather than using a fixed reduced frequency. When workload is low, frequency is reduced to save power and extend operational time. When workload increases or thermal headroom is available, frequency is increased to maintain processing performance, achieving an optimal balance throughout operation.
Solution Approach 2:
The patent employs feedback mechanisms where temperature sensors and workload monitors continuously provide information to the clock management unit. This feedback loop enables the system to make informed decisions about frequency adjustment, ensuring that performance is maintained when necessary while extending operational time through appropriate frequency reduction during less demanding periods.
3Loss of energy
If the maximum operating clock frequency is simultaneously reduced for all cores, then heat and power consumption are lowered, but user-perceived performance degradation occurs
Solution Approach 1:
The patent applies different clock frequency settings to different cores based on their individual workload and thermal conditions rather than uniformly reducing frequency across all cores. This localized approach allows the system to reduce power consumption on idle or less demanding cores while maintaining high frequency on active cores, thereby lowering overall power consumption without degrading user-perceived performance.
Solution Approach 2:
The system segments the multi-core processor into independent controllable units, allowing differential frequency management for each core. This segmentation enables selective frequency adjustment where only necessary cores operate at high frequency, reducing total power consumption while maintaining performance for user-visible tasks.
Data Source
AI summary
A system-on-chip includes a symmetric multi-processor including a plurality of cores, each configured to operate in a high performance operating mode and a low performance operating mode. The system-on-chip further includes a clock management unit configured to provide an operating clock signal to the symmetric multi-processor, a state management unit configured to monitor operating states of the cores, a temperature management unit configured to monitor a temperature of the symmetric multi-processor, and a symmetric multi-processor control unit configured to determine the operating clock signal and the operating states of the cores based on a workload of the symmetric multi-processor. The symmetric multi-processor control unit is further configured to differentially determine a maximum operating clock frequency for the cores based on the temperature and the operating states of the cores, which indicate a quantity of cores that are currently in operation.