Symmetric TVS Circuit with Bipolar Base Snatch
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Solution Overview
Problem
Conventional bi-directional transient voltage suppressors (TVS) face issues with a floating base, leading to voltage variations and increased leakage currents due to charging and discharging currents, which are not effectively managed in symmetric NPN/PNP configurations.
Innovation Solution
A bi-directional symmetrical blocking TVS circuit is designed with the base connected to a lower potential terminal, utilizing bipolar transistors and MOS transistors, where the base is tied to the emitter potential, and the transistors are configured either laterally or vertically using integrated circuit manufacturing processes to ensure symmetrical clamping and reduce leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the base is left floating to achieve symmetrical breakdown in NPN/PNP configuration, then symmetrical clamping is achieved, but voltage variations over time (dV/dt) occur and leakage current increases
Solution Approach 1:
The patent introduces an intermediary mechanism (base-snatching circuit) that actively manages the base potential. Instead of leaving the base floating or directly connecting it to a fixed potential, the circuit dynamically controls the base potential to maintain symmetrical breakdown characteristics while preventing voltage variations and leakage current issues.
Solution Approach 2:
The patent changes the operational parameters of the bipolar transistors by dynamically adjusting the base potential. The base-snatching circuit modifies the base voltage parameter to achieve both symmetrical clamping and minimal leakage current, transforming the static floating base condition into a dynamically controlled state.
2Adaptability or versatility
If symmetric NPN/PNP configuration is used for bi-directional protection, then both positive and negative transient voltages are protected, but the floating base causes charging and discharging currents that increase leakage
Solution Approach 1:
The base-snatching circuit acts as an intermediary that manages the interaction between the symmetric NPN/PNP configuration and the base potential. It enables bi-directional protection to function properly while mediating the base potential to prevent charging and discharging currents that would otherwise increase leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively addresses the floating base issue by maintaining the base at a lower potential, significantly reducing leakage currents and achieving symmetrical bi-directional blocking of transient voltages, enhancing the protection of integrated circuits against overvoltage conditions.
Implementation Method 1
A bi-directional symmetrical blocking TVS circuit is designed with the base connected to a lower potential terminal, utilizing bipolar transistors and MOS transistors, where the base is tied to the emitter potential
Implementation Method 2
A TVS can be implemented with the PN junction device that has a breakdown voltage to allow current conduction when a transient input voltage exceeds the breakdown voltage to achieve the transient voltage protection
Data Source
AI summary
A symmetrical blocking transient voltage suppressing (TVS) circuit for suppressing a transient voltage includes an NPN transistor having a base electrically connected to a common source of two transistors whereby the base is tied to a terminal of a low potential in either a positive or a negative voltage transient. The two transistors are two substantially identical transistors for carrying out a substantially symmetrical bi-directional clamping a transient voltage. These two transistors further include a first and second MOSFET transistors having an electrically interconnected source. The first MOSFET transistor further includes a drain connected to a high potential terminal and a gate connected to the terminal of a low potential and the second MOSFET transistor further includes a drain connected to the terminal of a low potential terminal and a gate connected to the high potential terminal.