Symmetrical 2D Fin Structure for Vertical FET
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Solution Overview
Problem
Current VFET fin structures have limitations in scaling and symmetry, leading to inconsistent current paths due to process variations during manufacturing, which affects the performance and controllability of vertical field effect transistors.
Innovation Solution
A method for manufacturing a 2D-shaped fin structure for VFETs involving multiple layer patterning and spacer formation to create symmetrical sub-fin structures with consistent lengths, enhancing the current path between source/drain regions by etching the substrate and removing spacers to achieve a stable fin structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional VFET fin structure manufacturing is used, then device density is improved, but manufacturing precision deteriorates due to process variations affecting fin symmetry and current path consistency
Solution Approach 1:
The fin structure is divided into multiple segments including first and second sub-fin structures with consistent lengths, separated or connected on the substrate. This segmentation allows each sub-structure to be precisely controlled for symmetry while maintaining overall device density.
Solution Approach 2:
The patent employs asymmetrical patterning approaches where mask patterns traverse first patterns at different orientations, creating controlled asymmetrical spacer formations that ultimately produce symmetrical fin structures. The asymmetrical processing steps compensate for process variations to achieve symmetrical final geometry.
2Manufacturing precision
If multi-layer patterning and spacer formation is implemented, then manufacturing precision is improved for symmetrical fin structures, but device complexity increases
Solution Approach 1:
Multiple layers with patterns are formed in advance before final fin structure creation. First and second layers with traversing patterns are preliminarily patterned, and spacers are formed on exposed sidewalls before substrate etching. These preliminary structures serve as precise templates that ensure symmetrical fin formation while systematicalizing the complex process.
Solution Approach 2:
Spacer structures serve as intermediary elements between the patterned layers and the final fin structure. The spacers are formed on sidewalls of patterned layers, then used as masks during substrate etching to define the fin geometry. This intermediary approach simplifies control of the complex multi-step process by using spacers as reusable templates.
3Ease of operation
If fin structure length is increased in Z-direction, then gate controllability is improved, but manufacturing precision challenges increase due to scaling limitations
Solution Approach 1:
The fin structure extends in the vertical Z-direction with increased length to improve gate controllability. Multiple layers are stacked vertically with patterns traversing through different heights, and spacers are formed on sidewalls at different elevations. This three-dimensional approach allows longer fin length while maintaining manufacturing precision through vertical layering and sidewall spacer formation.
Data Source
AI summary
A method for manufacturing a fin structure of a vertical field effect transistor (VFET) includes: (a) patterning a lower layer and an upper layer, deposited on the lower layer, to form two patterns extended in two perpendicular directions, respectively; (b) forming a first spacer and a second spacer side by side in the two patterns along sidewalls of the lower layer and the upper layer exposed through the patterning; (c) removing the first spacer, the second spacer and the upper layer above a level of a top surface of the lower layer, and the first spacer below the level of the top surface of the lower layer and exposed through the two patterns in the plan view; (d) removing the lower layer, the upper layer, and the second spacer remaining on the substrate after operation (c); and (e) etching the substrate downward except a portion thereof below the first spacer remaining on the substrate after operation (d), and removing the remaining first spacer, thereby to obtain the fin structure.