Symmetrical Redistribution Substrate Layout for Warpage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor industry faces challenges in achieving high integration density and reliability in semiconductor packaging due to warpage issues caused by coefficient of thermal expansion (CTE) mismatches between different layers.

Innovation Solution

A package component is designed with symmetrical redistribution structures on either side of a core substrate, which provides electrical connections between integrated circuit dies and external conductive features, thereby reducing fabrication stresses and warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If asymmetrical redistribution structures are used to provide electrical connections, then electrical connectivity is improved, but warpage and fabrication stresses increase due to CTE mismatches

Engineering Contradiction:
Improveelectrical connectivityVSAvoidwarpage
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies asymmetry in reverse by deliberately creating symmetrical redistribution structures on both sides of the core substrate. This symmetry balances the CTE mismatches and fabrication stresses that would otherwise cause warpage, while still achieving the required electrical connectivity through the symmetrical arrangement of conductive features

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent changes the structural parameter from asymmetrical to symmetrical redistribution structures. This parameter change equalizes the stress distribution across the core substrate, reducing warpage while maintaining electrical connectivity through the balanced configuration of conductive layers and features

Inventive Principle:
Principle #35Parameter changes

2Reliability

If more redistribution layers are added to increase electrical connectivity, then electrical connectivity is improved, but fabrication stresses and warpage increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidfabrication stresses
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from single-sided to dual-sided redistribution structures, utilizing the third dimension (z-axis) by placing symmetrical conductive layers on both top and bottom surfaces of the core substrate. This dimensional approach distributes the complexity across multiple layers while maintaining stress balance through symmetry

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If symmetrical redistribution structures are used to reduce warpage, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvewarpage controlVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the redistribution structures into symmetrical components on both sides of the core substrate. Each side contains corresponding conductive layers and features that mirror each other, creating a segmented yet balanced structure that controls warpage while organizing complexity into manageable symmetrical units

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The symmetrical construction of redistribution structures reduces warpage and enhances component and board reliability by equalizing stresses across the core substrate, allowing for a higher redistribution structure layer count and improved electrical connectivity.

Implementation Method 1

warpage issues caused by coefficient of thermal expansion (CTE) mismatches between different layers

Methodology Applied
Scientific EffectCoefficient of thermal expansion (CTE) mismatch: Thermal Expansion

Data Source

PatentUS12205879B2Symmetrical substrate for semiconductor packaging
Publication Date: 2025.01.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12205879B2 patent drawing
  • US12205879B2 patent drawing
  • US12205879B2 patent drawing

AI summary

An integrated circuit package that includes symmetrical redistribution structures on either side of a core substrate is provided. In an embodiment, a device comprises a core substrate, a first redistribution structure comprising one or more layers, a second redistribution comprising one or more layers, a first integrated circuit die, and a set of external conductive features. The core substrate is disposed between the first redistribution structure and the second redistribution structure, the first integrated circuit die is disposed on the first distribution structure on the opposite side from the core substrate; and the set of external conductive features are disposed on a side of the second redistribution structure opposite the core substrate. The first redistribution structure and second redistribution structure have symmetrical redistribution layers to each other with respect to the core substrate.