Synapse String Array for Binary Neural Networks
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Solution Overview
Problem
Existing binary neural networks face challenges with low reliability and integration due to the use of MEMRISTOR-based synapses and logic gates, which result in poor device reliability and low integration levels.
Innovation Solution
A synapse string array is proposed, comprising pairs of two-dimensional or three-dimensional memory cell strings and switch devices connected in series, utilizing MOSFETs with non-volatile memory functions to perform XNOR operations and implement high-reliability, high-integration synapse morphic devices, enabling a neuron-like function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If MEMRISTOR-based synapses are used in binary neural networks, then the device can perform XNOR operations, but the reliability is poor and dispersion between devices is large
Solution Approach 1:
The patent combines two cell strings with memory cell devices in one-to-one correspondence to form a single synapse morphic device. This merging approach creates a more reliable synapse structure where the paired cell strings work together to perform XNOR operations, reducing device dispersion and improving reliability while maintaining the desired computational functionality.
2Reliability
If logic gates are used to implement binary neural networks, then reliability is good, but the degree of integration is low
Solution Approach 1:
The patent extracts the logical operation functionality from separate logic gates and integrates it directly into the memory cell structure itself. By configuring memory cell devices in specific patterns within the cell strings, the synapse morphic devices can perform XNOR operations intrinsically, eliminating the need for separate logic gate circuits and achieving high integration while maintaining reliability.
Solution Approach 2:
The memory cell devices serve multiple functions: they store data in the traditional sense and simultaneously perform logical XNOR operations as synapses. This multi-functionality allows the same hardware structure to achieve both memory storage and computational logic, increasing integration density while maintaining the reliability of proven memory technologies.
3Adaptability or versatility
If traditional synapse structures are used, then the neural network can be implemented, but the power consumption is high and heat release is serious
Solution Approach 1:
The synapse morphic devices perform computational operations passively through their inherent memory cell structure and resistance characteristics. The XNOR operation emerges naturally from the electrical characteristics of the paired memory cell devices without requiring active computation circuits, significantly reducing power consumption and heat generation while maintaining full neural network functionality.
Data Source
AI summary
Provided is synapse strings and synapse string arrays. The synapse string includes: first and second cell strings, each having a plurality of memory cell devices connected in series; and first switch devices, each connected to one of two ends of each of the first and second cell strings. The memory cell devices of the first cell string and the memory cell devices of the second cell string are in one-to-one correspondence to each other, and terminals of pairs of the memory cell devices being in one-to-one correspondence to each other are applied with read voltages and electrically connected to each other to constitute one synapse morphic device, so that the synapse string includes a plurality of synapse morphic devices connected in series. The synapse string includes a peripheral circuit and a reference current source for implementing a function of a neuron.