Synapse Weight Update Compensation for NVRAM Variation
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Solution Overview
Problem
Non-volatile analog memory systems in neuromorphic systems face challenges in consistently updating synapse weight values across all memory cells due to device characteristic variations, making it difficult to maintain a constant or controllable update amount.
Innovation Solution
A synapse memory system with a write portion and read drivers, including a write driver, output controller, and lookup table (LUT), which compensates for device characteristics of non-volatile random access memory (NVRAM) to ensure consistent weight value updates by storing and applying compensation amounts for pulse signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a non-volatile analog memory is used to store synapse weight values, then the system can achieve continuous control of resistance and capacitance for weight representation, but device characteristic variations cause inconsistent weight update amounts across different memory cells
Solution Approach 1:
The patent applies local quality by customizing the write signal characteristics for each individual synapse memory cell based on its specific device characteristics. The output controller adjusts pulse width, amplitude, or number of pulses per weight update step according to the measured characteristics of each cell, ensuring that each cell responds consistently to weight update commands despite manufacturing variations.
Solution Approach 2:
The patent implements parameter changes by dynamically modifying write signal parameters (pulse width, amplitude, duration) based on the measured device characteristics of each memory cell. The system determines optimal write signal parameters during initialization and stores them for subsequent weight update operations, allowing consistent weight updates across cells with different electrical characteristics.
2Ease of operation
If the output level of the write signal is kept constant, then the write operation is simple, but the weight update amount varies due to device characteristic differences
Solution Approach 1:
The patent applies preliminary action by measuring the device characteristics of each synapse memory cell during initialization and determining the appropriate write signal parameters before actual weight updates begin. The output controller stores these pre-determined parameters and uses them during weight update operations, eliminating the need for real-time signal adjustment while maintaining accuracy.
Solution Approach 2:
The patent implements feedback by using the measured device characteristics of each memory cell to adjust the write signal parameters. The system reads the actual electrical characteristics of each cell and uses this information to customize the write signal, creating a feedback loop that ensures accurate and consistent weight updates across all cells.
3Manufacturing precision
If individual compensation for each memory cell is implemented, then weight update consistency is improved, but the system complexity increases due to additional control mechanisms
Solution Approach 1:
The patent applies self-service by having each synapse memory cell's characteristics automatically measured and stored during initialization, with the output controller autonomously selecting and applying the appropriate write signal parameters based on pre-stored lookup tables. This automation reduces the need for complex external control mechanisms while maintaining individualized compensation for each cell.
Data Source
AI summary
A synapse memory system includes synapse memory cells, each of which includes a non-volatile random access memory (NVRAM). Each synapse memory cell is configured to store a weight value according to an output level of a write signal. A write portion is configured to write the weight value to each synapse memory cell and includes a write driver and an output controller. The write driver is configured to output the write signal to each synapse memory cell. The output controller is configured to control the output level of the write signal of the write driver. Read drivers are configured to read the weight value stored in the synapse memory cells. The output controller is configured to control the output level of the write signal in updating the weight value in the synapse memory cell, to compensate for weight value variation according to a device characteristic of the NVRAM.