Synaptic Reuse Circuit for Shared SNN Input Pathways

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Solution Overview

Problem

The implementation of Spiking Neural Networks (SNNs) in hardware requires a large number of transistors and memory, leading to increased power consumption and complex, bulky circuitry due to the need for multiple dedicated pathways between input sources and neurons.

Innovation Solution

A circuit design that includes a plurality of artificial neurons, artificial synapses, variable gain amplifiers, a router, and a gain configuration controller, which uses a time division schema and input source identity to set gains on variable gain amplifiers, allowing for shared transmission pathways and reducing the number of components and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple dedicated pathways are used between input sources and neurons, then signal transmission reliability is improved, but device complexity and space requirements increase

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple dedicated pathways into a shared transmission pathway by implementing time-division multiplexing. Multiple input sources share a common synaptic pathway, with each input assigned to specific time slots, thereby reducing the total number of pathways while maintaining signal integrity through temporal separation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces dynamic gain control where variable gain amplifiers adjust their amplification factors based on which input source is currently active. The gain configuration controller dynamically reconfigures the synaptic weights and amplifier gains according to the time-division schema, allowing the system to adapt to different input sources sharing the same physical pathway.

Inventive Principle:
Principle #15Dynamics

2Power

If many transistors are used to model SNN non-linear dynamics, then computational power is improved, but power consumption increases

Engineering Contradiction:
Improvecomputational powerVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent makes a single synaptic pathway serve multiple functions by allowing it to process signals from multiple different input sources through time-division multiplexing. The same physical hardware (transistors, amplifiers) is reused for different computational purposes at different time slots, reducing the total component count while maintaining SNN computational capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the operational parameters of the variable gain amplifiers based on the active input source. By dynamically adjusting gain parameters according to the time-division schema and input source identity, the system achieves different computational effects using the same hardware, reducing the need for additional transistors while maintaining computational power.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If a large number of hardware components are used to implement SNN, then processing capability is improved, but manufacturing difficulty increases

Engineering Contradiction:
Improveprocessing capabilityVSAvoidmanufacturing ease
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent combines multiple input pathways into a single shared pathway, reducing the total number of hardware components that need to be manufactured and assembled. By using time-division multiplexing, the system achieves equivalent processing capability with fewer physical components, simplifying the manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements periodic time-division multiplexing where different input sources are sequentially activated in regular time slots. This periodic structure allows the same hardware components to be reused in a predictable pattern, simplifying manufacturing and testing compared to implementing permanent dedicated pathways for each input source.

Inventive Principle:
Principle #19Periodic action

4Area of stationary object

If shared transmission pathways are used, then space requirements are reduced, but signal collision risk increases

Engineering Contradiction:
Improvechip areaVSAvoidsignal transmission reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent performs preliminary configuration of the time-division schema and gain parameters before signal transmission begins. The gain configuration controller pre-sets the appropriate gain values for each time slot and input source combination, ensuring that signals are properly scaled before they are transmitted over the shared pathway, thereby preventing signal collisions and interference.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback control through the gain configuration controller that monitors the active input source and dynamically adjusts the amplifier gains accordingly. This feedback mechanism ensures that only one input source is active at a time on the shared pathway, preventing signal collisions while maintaining space efficiency.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12346796B2Artificial intelligence hardware with synaptic reuse
Publication Date: 2025.07.01 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12346796B2 patent drawing
  • US12346796B2 patent drawing
  • US12346796B2 patent drawing

AI summary

Synaptic reuse allows for a plurality of artificial neurons to be associated with corresponding pluralities of artificial synapses and variable gain amplifiers, to thereby use less space and fewer components to implement and less power to operate than neurons having dedicated paths for each input source. To reduce the likelihood of signal collision, and allow for the independent control and interpretation of input spikes, a router is configured to connect input sources to each of the plurality of artificial neurons in conjunction with a gain configuration controller that is configured to set a gain on each of the plurality of variable gain amplifiers based on a time division schema and an identity of an input source transmitting a spike during a given time.