Analog Synaptic Weight Confirmation for Retention-Stable AI Memory

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Analog synaptic devices in artificial neural networks face retention issues due to conductance degradation over time, making stable operation challenging, and existing methods for high-resolution weights are area-inefficient or lack complete parallelism in synapse array inference.

Innovation Solution

A weight confirmation method for analog synaptic devices involves forming strong filaments by applying stress voltages to maintain conductance stability, allowing on-chip learning and confirmation of binary/ternary weights using a single memory device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If analog synaptic devices are used for high resolution weights, then weight precision is improved, but retention deteriorates due to conductance degradation over time

Engineering Contradiction:
Improveweight precisionVSAvoidretention
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by performing weight confirmation before the conductance degradation significantly affects network operation. The confirmation process reads the current conductance values and adjusts them to match the learned weights, proactively preventing retention errors from propagating through the neural network.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the weight confirmation mechanism that continuously monitors and adjusts synaptic conductance values. The system reads actual conductance from analog synaptic devices, compares it with learned weights, and applies corrections via stress voltages to maintain accurate weight representation over time.

Inventive Principle:
Principle #23Feedback

2Reliability

If multiple 1-bit RRAMs are used to represent high resolution weights, then retention is improved, but device area increases significantly

Engineering Contradiction:
ImproveretentionVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple functional operations into a single analog synaptic device. Instead of using separate 1-bit RRAMs for each weight bit, the system uses one analog device that can represent high-resolution weights through continuous conductance modulation, then applies confirmation to ensure retention. This consolidation dramatically reduces the number of physical devices required.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent makes the analog synaptic device universal by enabling it to perform both high-resolution weight storage during learning and reliable weight retention during inference. The single device handles multiple functions: conducting neural network computations, storing high-precision weights, and maintaining those weights over time through confirmation mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If XNOR operation or single memory device is used for BNN/TNN, then device complexity is reduced, but parallelism in synapse array inference is limited

Engineering Contradiction:
Improvedevice complexityVSAvoidparallelism
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the weight representation into positive and negative synaptic devices within each weight unit. This segmentation enables independent operation and parallel processing of weight components, allowing complete parallelism in synapse array inference while maintaining manageable device complexity through standardized device structures.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Stabilizes conductance for extended periods, enabling stable operation of artificial neural networks with high-resolution weights and efficient on-chip learning, improving inference performance.

Implementation Method 1

forming strong filaments by applying stress voltages to maintain conductance stability

Methodology Applied
Scientific EffectConductance stabilization through stress voltage application:

Data Source

PatentUS12572788B2Weight confirmation method for an analog synaptic device of an artificial neural network
Publication Date: 2026.03.10 HYUNDAI MOTOR CO LTD
  • US12572788B2 patent drawing
  • US12572788B2 patent drawing
  • US12572788B2 patent drawing

AI summary

A weight confirmation method for analog synaptic devices of an artificial neural network includes: learning artificial neural network hardware based on artificial analog memory devices using an artificial neural network learning algorithm; after the learning of the artificial neural network hardware, reading a total weight of a pair of synaptic devices; comparing the total weight of the pair of synaptic devices with 0; applying weights to a positive synaptic device and a negative synaptic device of the pair of synaptic devices, respectively; and confirming the total weight of the pair of synaptic devices in accordance with the weight of the positive synaptic device and the weight of the negative synaptic device. A retention problem of analog synaptic devices is overcome and thus the artificial neural network may stably operate.