Automated Synchronous to Asynchronous Circuit Design Conversion
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Solution Overview
Problem
Existing methods for converting synchronous circuit designs to asynchronous representations are either time-intensive and require redesign, or lack effective automated solutions, especially when dealing with multiple clock domains, latches, flip-flops, and clock gating, and fail to preserve the illusion of synchrony at primary inputs and outputs.
Innovation Solution
An automated method and system that converts synchronous circuit designs to asynchronous representations without user interaction, using software to process and manipulate asynchronous designs, allowing synchronous designs to be implemented with asynchronous hardware solutions while preserving synchrony at primary inputs and outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If manual redesign of the circuit using asynchronous representation is performed, then the circuit can be implemented in asynchronous architecture, but the process is time intensive and requires designers to learn completely new representation methods
Solution Approach 1:
The patent creates a automated translation system that copies the synchronous circuit design into an asynchronous representation. The system takes synchronous circuit descriptions (netlists, HDL code) and generates equivalent asynchronous representations automatically, eliminating the need for manual redesign while preserving circuit functionality.
Solution Approach 2:
The patent replaces the manual mechanical process of circuit redesign with an automated computational system. The translation system uses algorithms to automatically convert synchronous circuit representations into asynchronous representations, substituting human designer effort with automated software processing.
2Productivity
If automated conversion of synchronous to asynchronous representations is implemented, then conversion efficiency is improved, but existing solutions fail to handle multiple clock domains, latches, flip-flops, and clock gating effectively
Solution Approach 1:
The patent segments the conversion process into distinct handling of different circuit elements. The system processes synchronous circuits by identifying and converting specific components (flip-flops, latches, clock gating structures) separately while maintaining their relationships. This segmentation allows accurate handling of complex scenarios with multiple clock domains and element types.
Solution Approach 2:
The patent changes the representation parameters of the circuit description. The system transforms synchronous circuit parameters (clocked operations, edge-triggered behaviors) into asynchronous parameters (event-driven, level-sensitive behaviors). This parameter transformation enables accurate conversion while preserving circuit functionality across complex scenarios.
3Adaptability or versatility
If synchronous design representations are converted to asynchronous representations, then asynchronous hardware solutions can be used, but the illusion of synchrony at primary inputs and outputs is lost
Solution Approach 1:
The patent introduces interface synchronizers as intermediary components. These synchronizers act as mediators between the asynchronous internal circuitry and synchronous external interfaces. The synchronizers convert asynchronous signals to synchronous signals at the primary inputs and outputs, preserving the illusion of synchrony at the interface while allowing asynchronous operation internally.
Data Source
Figure 1
Figure 2~3B
Figure 4A~5
AI summary
Methods (700, 800, 900) and systems (Fig. 1) automate an approach to convert a circuit design from a synchronous representation (Fig. 4A) to an asynchronous representation (Fig. 4B) without interaction or redesign. Conversion of representations of synchronous circuit designs (101) to and from representations of asynchronous circuit designs (104) enable traditional electronic design automation tools to process asynchronous designs while allowing synchronous designs to be implemented using asynchronous hardware solutions. Feedback to synchronous design tools (105) in synchronous representation enables optimization while minimizing the need for knowledge of the underlying asynchronous architecture and hardware.