Synchronous Multi-Input Comparator for ISI-Resistant Bus Demodulation
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Solution Overview
Problem
High-speed digital interconnection systems face limitations in achieving reliable, error-free data transfer at rates beyond 20 Gbps due to data skew, inter-symbol interference, and increased complexity and power consumption, which conventional signaling methods struggle to address effectively.
Innovation Solution
The implementation of a system using vector signaling codes, specifically Ensemble NRZ (ENRZ) and duobinary encoding, combined with Hadamard transforms and synchronously-switched multi-input demodulating comparators, to create multiple frequency-domain channels over a four-wire bus, enabling robust data transfer at 56 Gigabits per second per wire with reduced ISI and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional signaling methods are used for high-speed digital interconnection, then data transfer rate can be increased, but data skew and inter-symbol interference increase causing reliability degradation
Solution Approach 1:
The patent segments the data transfer problem by creating multiple frequency-domain channels over a four-wire bus using vector signaling codes. Each channel operates independently at lower rates, avoiding the skew and ISI problems of single high-speed channels while achieving high aggregate throughput through parallel processing of multiple sub-channels.
Solution Approach 2:
The patent transforms the signaling approach by changing from conventional single-frequency signaling to multi-frequency vector signaling. By encoding data as vectors in the frequency domain and using synchronously-switched multi-input demodulating comparators, the system achieves high-speed transfer while maintaining signal integrity through parameter transformation rather than direct high-rate signaling.
2Speed
If conventional signaling methods are used to achieve high data transfer rates, then speed increases, but complexity and power consumption increase
Solution Approach 1:
The synchronously-switched multi-input demodulating comparator serves multiple functions: it demodulates multiple frequency-domain channels simultaneously, performs error detection, and enables high-speed data transfer. This multi-functional component reduces overall system complexity by consolidating what would otherwise require separate processing stages.
Solution Approach 2:
The patent replaces conventional high-speed electrical signaling with a frequency-domain vector signaling approach. By transforming the problem from time-domain high-speed switching to frequency-domain parallel processing, the system achieves high speed without the mechanical and temporal constraints of conventional signaling methods.
3Productivity
If conventional signaling methods are used for high-speed transfer, then data transfer rate increases, but inter-symbol interference increases
Solution Approach 1:
The patent moves the signaling problem from the time dimension to the frequency dimension. By encoding data as vectors across multiple frequency channels rather than sequential time slots, the system eliminates inter-symbol interference that plagues high-speed time-domain signaling while maintaining high aggregate data transfer rates.
Data Source
AI summary
Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.