Synchronization Control Apparatus for Interlaced Scan Jitter

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Solution Overview

Problem

Interlaced scan signals in monitors result in a one-scan-line time difference between odd and even fields, leading to incompatibility issues and vertical jittering in image display due to unequal pulse intervals, which existing technologies fail to synchronize effectively.

Innovation Solution

A synchronization control apparatus and method that includes a delay circuit to generate a delayed vertical sync signal and a multiplexer to select between the original and delayed signals based on an odd/even field indication, ensuring equal pulse intervals for both fields, thereby generating a synchronized output vertical sync signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the OVS signal is controlled to be synchronous with the IVS signal to achieve normal video display without excessive memory buffering, then memory usage is reduced, but the pulse interval difference between odd and even fields propagates from input to output causing display incompatibility

Engineering Contradiction:
Improvememory bufferingVSAvoiddisplay compatibility
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies dynamics by making the delay amount adjustable based on field type. The synchronization control circuit dynamically changes the delay applied to even field VS signals (one scan line delay) versus odd field VS signals (no delay), allowing the system to adapt to the interlaced scan structure and eliminate pulse interval differences without requiring excessive memory buffering

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the time delay parameter selectively for even field VS signals. By introducing a one scan line delay specifically for even fields while maintaining odd fields unchanged, the patent equalizes the pulse intervals of both fields at the output, resolving the display compatibility issue while maintaining efficient memory usage

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If video processing operations are performed with odd and even field data in the same way, then processing is simplified, but vertical jittering is introduced to the images

Engineering Contradiction:
Improveprocessing complexityVSAvoidimage stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by treating odd and even field VS signals differently based on their specific characteristics. The synchronization control circuit identifies the field type and applies different delay operations: no delay for odd fields and one scan line delay for even fields. This localized differentiation eliminates vertical jittering while keeping the overall processing framework simple

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7623185B2Synchronization control apparatus and method
Publication Date: 2009.11.24 REALTEK SEMICON CORP
  • US7623185B2 patent drawing
  • US7623185B2 patent drawing
  • US7623185B2 patent drawing

AI summary

A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of the IVS signal and the delayed signal according to an odd/even field indication signal to generate an output vertical sync (OVS) signal.