Dynamic Sync Point Mechanism for Master-Slave Boot Synchronization

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing multi-node data processing systems face challenges in synchronizing the boot process of slave processors with the master processor due to the requirement for identical firmware views at synchronization points, leading to difficulties in development and deployment as master and slave firmware need to be developed and updated concurrently.

Innovation Solution

The implementation of dynamic sync points that can be enabled or disabled by the master processor during the boot process, allowing for backward and forward compatibility, using a sync point table and header files to manage sync points, and enabling the master processor to control the execution of slave processors through a distributed data fabric.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing sync point solutions are used to synchronize slave processor boot process with master processor, then synchronization is achieved, but firmware on master and slave processors must be developed and updated concurrently, increasing development complexity

Engineering Contradiction:

Improvesynchronization reliabilityVSAvoidfirmware development complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The sync point mechanism is segmented into independent components: sync point definitions in header files, sync point table data structures, and runtime synchronization logic. This allows firmware to be developed and updated independently while maintaining synchronization reliability through the structured framework.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A sync point table acts as an intermediary data structure between master and slave processor firmware. The table stores sync point identifiers and states, allowing the master to query and control slave synchronization points without requiring identical firmware versions, thus decoupling the development cycles.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If firmware updates are performed concurrently on master and slave processors to maintain identical sync point views, then synchronization consistency is maintained, but update time and system downtime increase

Engineering Contradiction:

Improvesync point view consistencyVSAvoidfirmware update time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

Sync point definitions are prepared in advance in header files and compiled into the firmware binary. The sync point table is pre-populated with sync point identifiers and initial states. This preliminary preparation allows rapid firmware updates without requiring coordinated updates across all processors, reducing system downtime.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sync point table is designed to be dynamically queryable and modifiable at runtime. The master processor can query the slave's sync point table to determine current synchronization states and dynamically adjust sync point configurations without requiring a complete firmware re-synchronization, enabling asynchronous updates.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If dynamic sync points are implemented to decouple firmware development cycles, then development flexibility improves, but sync point management complexity increases

Engineering Contradiction:

Improvefirmware update flexibilityVSAvoidsync point management complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The sync point table serves multiple functions: storing sync point identifiers, tracking synchronization states, enabling dynamic queries by the master processor, and supporting runtime modifications. This multi-functional design consolidates what would otherwise require separate management mechanisms, reducing overall complexity despite the dynamic capabilities.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

Sync points are implemented as configurable parameters in the sync point table rather than fixed code locations. The master processor can query and modify sync point states by changing table parameters, enabling flexible firmware updates and dynamic synchronization control without altering the fundamental boot process structure.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS11604655B2Sync point mechanism between master and slave nodes

Publication Date: 2023.03.14 ATI TECHNOLOGIES ULC

AI summary

In a system with a master processor and slave processors, sync points are used in boot instructions. While executing the boot instructions, the slave processor determines whether the sync point is enabled. In response to determining the sync point is enabled, the slave processor pauses execution of the boot instructions, waits for commands from the master processor, receives commands from the master processor, executes the received commands until a release command is received, and then continues to execute boot instructions. In response to determining the sync point is not enabled, the slave processor continues to execute boot instructions.