Synchronized Boost Signal Apparatus for Noise Reduction

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Solution Overview

Problem

Conventional boost circuits generate unsynchronized boost signals that can cause noise interference with critical events in a circuit, leading to increased design complexity and costs to mitigate these issues.

Innovation Solution

A synchronization system that synchronizes the boost signal with either an external clock or an internal phase-locked loop (PLL) signal, delaying the boost signal to avoid coinciding with rising edges, thus preventing noise interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional boost circuits are used to boost voltage from low to high, then voltage boosting is achieved, but noise interference and supply spikes occur during boosting process

Engineering Contradiction:

Improvevoltage boosting capabilityVSAvoidnoise interference and supply spikes

Core Design Contradiction:

PowerVSObject-affected harmful factors

Solution Approach 1:

The synchronization circuit delays the boost signal until a safe time window is identified (after the rising edge of the reference signal), performing the boosting action in advance of the critical event rather than simultaneously with it

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

A synchronization circuit is introduced as an intermediary component between the boost circuit and the rest of the system, mediating the timing of boost signals to prevent direct interference with critical events

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If additional design headroom and internal supply regulation are incorporated to mitigate noise, then noise immunity is improved, but chip cost increases

Engineering Contradiction:

Improvenoise immunityVSAvoidchip cost and design complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The noise mitigation function is extracted from the chip's internal circuitry and implemented externally through a synchronization circuit, removing the need for additional internal supply regulators and design headroom

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The boost circuit continues to operate as before, but the synchronization circuit automatically adjusts its timing based on the reference signal, making the system self-regulating without requiring complex internal mitigation circuitry

Inventive Principle:

Principle #25Self-service

3Ease of operation

If boost signals are generated without synchronization, then boosting operation is simple, but supply spikes may interrupt component operation

Engineering Contradiction:

Improveboosting operation simplicityVSAvoidcomponent operation stability

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The synchronization circuit uses feedback from the reference signal to dynamically adjust the timing of boost signals, ensuring they are generated only during safe time windows when they will not interfere with critical events

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS7501803B1Synchronized boost signal apparatus and method

Publication Date: 2009.03.10 INFINEON TECHNOLOGIES AMERICAS CORP

AI summary

A method and apparatus to synchronize a boost signal. The apparatus includes a boost circuit and a synchronization circuit. The synchronization circuit is coupled to the boost circuit. The boost circuit generates an unsynchronized boost signal to boost a voltage signal from a first voltage to a second voltage. The synchronization circuit synchronizes the unsynchronized boost signal with a reference signal to generate a synchronized boost signal.