Multi-Chip Package Debugging via Synchronized Counters
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Solution Overview
Problem
Debugging systems within a single package composed of multiple semiconductor chips is challenging due to the complexity of tracing operational flows across multiple chips.
Innovation Solution
A distributed but coordinated tracing infrastructure is implemented across multiple semiconductor chips within a single package, utilizing synchronized counters and tracing circuitry to record state information at critical moments, allowing for package-level tracing and debugging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are packed into a single package to increase functionality, then the system functionality and integration are improved, but the difficulty of debugging and tracing operational flows across chips increases
Solution Approach 1:
The patent divides the debugging system into chip-level components, where each semiconductor chip has its own tracing circuitry and control logic. This segmentation allows independent tracing on each chip while maintaining coordinated system-wide debugging capability, resolving the contradiction between high integration and debugging difficulty.
Solution Approach 2:
The patent introduces package-level tracing circuitry as an intermediary that coordinates between multiple chips. This intermediary manages trace data collection, synchronization, and output across chip boundaries, making the complex multi-chip system debuggable through a unified interface without requiring external complex setup.
2Difficulty of detecting and measuring
If chip-level tracing circuitry is added to each semiconductor chip for debugging capability, then the debugging capability is improved, but the device complexity and manufacturing complexity increase
Solution Approach 1:
The patent designs a universal tracing infrastructure where each chip contains tracing circuitry that can operate independently or in coordination with other chips. The same basic tracing blocks serve both single-chip and multi-chip debugging needs, reducing overall complexity by avoiding specialized circuitry for different scenarios.
Solution Approach 2:
The patent merges chip-level tracing with package-level tracing into a unified system. The tracing infrastructure is combined across multiple chips and the package level, allowing shared control logic and data paths that reduce redundancy and overall system complexity despite serving multiple chips.
3Measurement precision
If synchronized counters and tracing circuitry are implemented across multiple chips, then the tracing accuracy and system-state reconstruction are improved, but the manufacturing precision requirements and device complexity increase
Solution Approach 1:
The patent implements preliminary synchronization of counters across all chips before tracing begins. The synchronized counter mechanism is pre-configured with matching initial states and clock sources, ensuring that when tracing starts, all chips are already synchronized. This preliminary action eliminates the need for complex real-time synchronization adjustments during operation.
Solution Approach 2:
The patent uses identical counter designs and tracing circuitry replicated across multiple chips. Each chip contains a copy of the same synchronized counter logic and tracing blocks, ensuring behavioral consistency and simplifying verification. This copying approach ensures that manufacturing variations do not affect synchronization as long as the base design is consistent.
Data Source
AI summary
A method is described. The method includes maintaining a synchronized count value in each of a plurality of logic chips within a same package. The method includes comparing the count value against a same looked for count value in each of the plurality of logic chips. The method includes each of the plurality of logic chips recording in its respective local memory at least some of its state information in response to each of the plurality of logic chips recognizing within a same cycle that the count value has reached the same looked for count value.