Synchronized ECC Data Transfer for Noisy Flash Memory Buses
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Solution Overview
Problem
In electrically noisy environments, such as automobiles or aircraft, the integrity of data buses in flash memory systems is compromised due to noise interference, necessitating improved methods to maintain data integrity.
Innovation Solution
Implementing an error detection and correction algorithm (EDAC) that generates error correction code (ECC) data, which is transmitted alongside the data and stored in the memory array, allowing the memory device to correct errors and enhance data bus integrity, with an enable/disable flag controlling error correction operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is transmitted over a data bus in a noisy environment, then data transmission speed and system functionality are maintained, but data integrity is compromised due to noise interference
Solution Approach 1:
The patent applies preliminary action by generating error correction codes (ECC) before data transmission and appending them to the data packets. The controller calculates ECC data in advance based on the data to be transmitted, and this ECC data is attached to the data packets before they are sent over the noisy data bus. This allows the receiving device to correct errors that occur during transmission without requiring retransmission.
Solution Approach 2:
The patent uses error correction codes as an intermediary element between the transmitted data and the noise interference. The ECC data acts as a mediator that carries information about the data's integrity state, allowing the receiving device to detect and correct errors caused by noise without directly combating the noise itself. The ECC serves as a protective intermediary layer.
2Reliability
If error correction codes are appended to data packets, then data integrity is improved through error correction, but device complexity increases due to additional processing requirements
Solution Approach 1:
The patent applies segmentation by dividing the data transmission process into distinct components: original data, appended error correction codes, and control flags. The ECC data is segmented and attached separately to the data packets, and the enable/disable flag is segmented as a separate control element. This modular approach allows the system to implement error correction functionality while maintaining clear separation between data, correction codes, and control mechanisms.
3Reliability
If error correction operations are performed continuously, then data integrity is maximized, but power consumption and processing overhead increase
Solution Approach 1:
The patent applies dynamics by making the error correction functionality adjustable rather than static. The enable/disable flag allows the error correction operations to be dynamically enabled or disabled based on environmental conditions and system requirements. When the system operates in noisy environments, error correction is enabled; when operating in clean environments, it can be disabled to save power and reduce processing overhead.
Data Source
AI summary
Memory devices having a first plurality of data buffers coupled to sense circuitry, a second plurality of data buffers coupled to sense circuitry, and an error correction controller coupled to the first and second plurality of data buffers and configured to synchronize data from the first and second plurality of data buffers prior to transmitting the data, as well as systems containing such memory devices.