Synchronized Radar Chips for Fill Level Measurement

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Solution Overview

Problem

Current fill level measurement devices require a large number of transmission and reception channels to achieve high-quality imaging of filling material surfaces, leading to increased hardware complexity and energy consumption, especially when using high-frequency radar signals in the range of 75 GHz to 85 GHz.

Innovation Solution

A fill level measurement device utilizing synchronized radar chips with shared clock and data line assemblies to reduce circuit complexity, allowing for efficient processing and calculation of fill level and topology data using a common clock signal and integrated analogue-to-digital converters, while maintaining high-frequency signal processing capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If more transmission and reception channels are used to scan the filling material surface more precisely, then imaging quality is improved, but hardware complexity and energy consumption increase

Engineering Contradiction:
Improveimaging qualityVSAvoidhardware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the radar system into multiple independent radar chips, each containing its own transmission and reception channels. This segmentation allows the system to achieve high imaging quality through multiple channels while managing hardware complexity by distributing functionality across separate chips rather than integrating everything into a single complex unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines multiple radar chips into a single measurement device with shared evaluation circuitry and common clock signals. This merging approach reduces overall device complexity by consolidating control functions while maintaining the benefits of multiple transmission and reception channels for high-quality imaging.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If more transmission and reception channels are used to scan the filling material surface more precisely, then imaging quality is improved, but energy consumption increases

Engineering Contradiction:
Improveimaging qualityVSAvoidenergy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

By segmenting the radar system into multiple chips with independent channels, the system can activate only the necessary channels for a given measurement task, reducing overall energy consumption while maintaining the capability for high-quality imaging when full precision is required.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each radar chip is designed as a universal module capable of independent operation, allowing the system to scale energy consumption according to measurement needs. The evaluation circuit processes data from any combination of chips, enabling flexible energy management while preserving high imaging quality capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If multiple radar chips are used to reduce hardware complexity, then device complexity is reduced, but synchronization requirements increase

Engineering Contradiction:
Improvehardware complexityVSAvoidsynchronization requirements
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent merges the clock functions of multiple radar chips by providing a common clock signal to all chips through shared clock lines. This approach reduces device complexity by eliminating the need for separate clock circuits in each chip while ensuring precise synchronization across all radar channels through the unified timing signal.

Inventive Principle:
Principle #5Merging (Combining)

4Device complexity

If a common clock signal is shared among multiple radar chips, then device complexity is reduced, but signal transmission precision requirements increase

Engineering Contradiction:
Improvecircuit complexityVSAvoidsignal transmission precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent introduces clock line assemblies as intermediary transmission paths between the common clock source and individual radar chips. These dedicated clock lines serve as controlled intermediaries that maintain signal integrity and precise timing relationships, ensuring that the common clock signal delivers accurate synchronization information to each chip without degradation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables accurate and power-efficient fill level and topology measurement by synchronizing multiple radar chips with a common clock signal, reducing hardware requirements and energy consumption while maintaining high imaging quality.

Implementation Method 1

Fill level measurement using radar is known. In contrast with many other fields, the breakthrough for radar technology in fill level measurement was possible only once extremely small reflection signals could be recorded and processed by the electronics of the measurement devices.

Methodology Applied
Scientific EffectRadar: Radar

Implementation Method 2

one or more reception channels for receiving the transmission signals that are reflected at the filling material surface

Methodology Applied
Scientific EffectReflection: Reflection

Data Source

PatentUS10788351B2Fill level measurement device comprising a plurality of radar chips
Publication Date: 2020.09.29 VEGA GRIESHABER GMBH & CO
  • US10788351B2 patent drawing
  • US10788351B2 patent drawing
  • US10788351B2 patent drawing

AI summary

A fill level measurement device is provided, including a first radar chip and a second radar chip that is synchronised with the first radar chip, the first and second chips each include one or more transmission channels, each configured to radiate a transmission signal, and one or more reception channels, each configured to receive a reflected transmission signal from a filling material surface; an evaluation circuit, connected to the first and second chips by a data line assembly and being configured to calculate a fill level and/or a topology of the filling material surface of a medium in a container from reflected transmission signals received from the first and second chips; and a clock line assembly that connects the first chip to the circuit and is configured to provide the circuit with a common clock signal for evaluating the reflected transmission signals received from the first and second chips.