Synchronized Refresh Control Circuit for 3D Semiconductor Slices

Solution Overview

Problem

Conventional semiconductor apparatuses with three-dimensional structures face challenges in reducing peak current during refresh operations due to variations in process, voltage, and temperature, leading to inconsistent refresh cycles across multiple slices.

Innovation Solution

A refresh control circuit is designed to generate and synchronize refresh cycle signals across multiple slices using an oscillator and multiplexing block, with a master slice generating the refresh cycle signal and transmitting it through electrodes for synchronized operations among slave slices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If each slice has its own oscillator for generating refresh cycle, then refresh operation can be performed in each slice, but peak current increases and refresh cycles become inconsistent due to PVT variations

Engineering Contradiction:

Improverefresh cycle consistencyVSAvoidpeak current consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent merges the refresh cycle generation function from multiple distributed oscillators into a single centralized oscillator located in the master slice. This consolidation eliminates redundant oscillation circuits in slave slices, reducing peak current consumption while ensuring consistent refresh cycles across all slices through centralized control signal distribution.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a refresh control signal as an intermediary that mediates between the master slice's oscillator and the slave slices. This signal carries the synchronized refresh timing information from the master slice to all slave slices, ensuring consistent refresh cycles without requiring each slice to generate its own oscillation signal.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If each slice has its own oscillator for generating refresh cycle, then refresh operation can be performed independently in each slice, but refresh cycle consistency deteriorates due to PVT variations

Engineering Contradiction:

Improverefresh operation capabilityVSAvoidrefresh cycle consistency

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent merges the refresh cycle generation function from multiple distributed oscillators into a single centralized oscillator located in the master slice. This consolidation eliminates redundant oscillation circuits in slave slices, reducing peak current consumption while ensuring consistent refresh cycles across all slices through centralized control signal distribution.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a refresh control signal as an intermediary that mediates between the master slice's oscillator and the slave slices. This signal carries the synchronized refresh timing information from the master slice to all slave slices, ensuring consistent refresh cycles without requiring each slice to generate its own oscillation signal.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9620192B2Synchronizing refresh control circuit for a plurality of slices and semiconductor apparatus using the same

Publication Date: 2017.04.11 SK HYNIX INC

AI summary

A semiconductor apparatus with a plurality of slices electrically coupled through through electrodes. Any one slice of the plurality of slices may be configured to generate a refresh cycle signal in response to a refresh command, and transmit the refresh cycle signal to the other slices through the through electrodes. The other slices may be configured to perform refresh operations in synchronization with the refresh cycle signal.