Synchronous Detection Circuit for Wearable Bio-Impedance Monitoring
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Solution Overview
Problem
Conventional synchronous detection circuits for bio-impedance measurements face challenges such as high power consumption, large size, and reduced accuracy due to the need for wide bandwidth and complex analog components, making them unsuitable for wearable biometric monitoring devices.
Innovation Solution
A low-power, efficient synchronous detection circuit that uses a direct sampled topology with a sigma-delta ADC to generate four digital samples per period of the output waveform, eliminating the need for well-matched analog components and enabling programmable injection frequencies, thereby reducing circuit complexity and phase errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wide bandwidth is used to detect bio-impedance over a wide range of frequencies, then detection capability is improved, but power consumption increases
Solution Approach 1:
The patent implements a programmable injection frequency that can be dynamically changed to match different carrier frequencies, allowing the system to adapt to different bio-impedance measurement requirements without requiring a wide fixed bandwidth. This dynamic adjustment enables the system to operate efficiently at specific frequencies rather than maintaining wide bandwidth continuously.
Solution Approach 2:
The system changes the operating parameters (injection frequency, sampling rate) based on the desired carrier frequency. By programmably adjusting these parameters, the system achieves wide detection capability across different frequencies while consuming power only at the necessary level for each specific measurement, rather than maintaining high power consumption for wide bandwidth coverage.
2Ease of operation
If analog mixers are used to convert voltage waveform into DC signals, then signal conversion is achieved, but phase errors increase due to circuit mismatch
Solution Approach 1:
The patent replaces the mechanical/analog mixer system with a digital signal processing approach. Instead of using analog mixers that require precise component matching, the system uses digital multiplication and accumulation operations to achieve the same signal conversion function, thereby eliminating phase errors caused by analog circuit mismatch.
Solution Approach 2:
The system creates a digital model of the signal conversion process rather than relying on physical analog components. By copying the mathematical operations of mixing into the digital domain, the system achieves accurate signal conversion without the physical limitations and mismatches inherent in analog mixer circuits.
3Ease of operation
If two analog to digital converters operating simultaneously are used, then I and Q channel conversion is achieved, but circuit complexity and cost increase
Solution Approach 1:
The patent merges the conversion of I and Q channels into a single ADC by first combining the two channels into one signal, converting it with a single ADC, and then separating the components through digital processing. This eliminates the need for two separate ADCs and their associated complexity while maintaining the ability to process both in-phase and quadrature components.
Solution Approach 2:
The system transforms the problem from the time domain to the frequency domain through digital signal processing. By using a single ADC to capture the combined signal and then applying digital techniques to extract I and Q components, the system solves the conversion problem in a different dimensional space, avoiding the complexity of simultaneous dual-channel conversion.
4Measurement precision
If low pass filters with adjustable bandwidth are used for each carrier frequency, then noise rejection is improved, but circuit complexity increases
Solution Approach 1:
The patent replaces the analog low-pass filter system with a digital filtering approach. Instead of using adjustable analog filters that require complex circuitry for each carrier frequency, the system uses digital signal processing to achieve noise rejection, allowing bandwidth adjustment through software rather than hardware changes.
Solution Approach 2:
The system implements a universal digital filtering algorithm that can adapt to different carrier frequencies and bandwidth requirements through parameter adjustment. This single digital filter can serve multiple functions across different frequencies, eliminating the need for separate analog filters for each carrier frequency and significantly reducing circuit complexity.
Data Source
AI summary
Embodiments of synchronous detection circuits and methods are provided for extracting magnitude and phase information from a waveform. One embodiment of a synchronous detection circuit includes a driver circuit, an analog-to-digital converter (ADC) and a controller. The driver circuit is configured to supply an input waveform at an input frequency to a load. The ADC is coupled to receive an output waveform from the load, and configured for generating four digital samples, each spaced 90° apart, for every period of the output waveform. The controller is configured for setting an oversampling rate (OSR) of the ADC, so that the ADC generates an integer number, M, of sub-samples for each digital sample generated by the ADC, where the integer number, M, of sub-samples is inversely proportional to the input frequency of the input waveform. The controller is further configured to use the digital samples generated by the ADC to extract magnitude and phase information from the output waveform.