Synchronous I/O Clock Filtering for Low-Cost Interface Lockout

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Inexpensive electronic devices lack the capability to disable or enable their synchronous input/output interfaces, making them vulnerable to unauthorized access and compromising security, unlike expensive high-end devices which often have such provisions.

Innovation Solution

An electronic device with a filter circuit that receives activation or deactivation signals to control the operation of a synchronous I/O interface, allowing the interface to be easily enabled or disabled without modifying the chip, using a general-purpose I/O pin and a filter circuit capable of blocking or passing clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an expensive high-end device provides an option for disabling the synchronous I/O interface, then security is improved, but device cost increases

Engineering Contradiction:

ImprovesecurityVSAvoiddevice cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs a disposable fuse component that can be blown to permanently disable the synchronous I/O interface. This cheap, simple component provides the security disabling capability without requiring expensive complex circuitry, thus resolving the contradiction between security and device cost for inexpensive devices

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent introduces an intermediary fuse component between the clock signal source and the synchronous I/O interface. This fuse acts as a mediator that can be activated to block the clock signal and disable the interface, providing a low-cost security mechanism that doesn't require modifying the chip itself

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a fuse is blown to disable the synchronous I/O interface, then security is improved, but the interface cannot be re-enabled

Engineering Contradiction:

ImprovesecurityVSAvoidre-enable capability

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent provides dynamic control capability by offering multiple disabling mechanisms including a re-enableable latch circuit controlled by a reset signal. This allows the system to transition between enabled and disabled states as needed, providing adaptability while maintaining security when disabling is required

Inventive Principle:

Principle #15Dynamics

3Ease of operation

If the synchronous I/O interface is left enabled for easy operation, then ease of operation is improved, but security vulnerability increases

Engineering Contradiction:

Improveinterface accessibilityVSAvoidsecurity vulnerability

Core Design Contradiction:

Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent implements preliminary protective measures by providing multiple disabling mechanisms (fuse, latch, filter circuit) that can be activated before security threats materialize. These pre-configured security features allow the interface to remain enabled for normal operation while having immediate capability to disable it if security concerns arise

Inventive Principle:

Principle #9Preliminary anti-action

Data Source

PatentUS11575385B2Controlling synchronous I/O interface

Publication Date: 2023.02.07 U-BLOX

AI summary

An electronic device includes: a first input node configured to receive a dock signal; a second input node configured to receive an activation signal or a deactivation signal; a filter circuit responsive to: (a) the activation signal to activate the filter circuit to block the dock signal; or (b) the deactivation signal to deactivate the filter circuit to pass the dock signal; and an output node configured for coupling to a synchronous I/O interface of an integrated circuit to control operation of the synchronous I/O interface.