Synchronous Rectifier Control for Current Inversion Prevention
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Solution Overview
Problem
Current synchronous rectification in resonant converters experiences current inversion due to parasitic inductances, leading to inefficiencies and potential converter malfunctions during load current transients.
Innovation Solution
A current inversion prevention control algorithm that adjusts the turn-off time of synchronous rectifier transistors based on calculated thresholds and sensed drain-source voltages, accounting for stray inductance effects to prevent current reversal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If synchronous rectifier transistors are used to reduce rectifier losses, then conversion efficiency is improved, but current inversion occurs due to parasitic inductances during load current transients
Solution Approach 1:
The control algorithm calculates a threshold value in advance based on previous half-cycle voltage measurements and uses this pre-computed threshold to determine turn-off timing, preventing current inversion before it occurs during load transients
Solution Approach 2:
The system continuously monitors drain-source voltage across the synchronous rectifier transistor, compares it against the calculated threshold, and adjusts the turn-off timing based on this feedback to prevent current inversion while maintaining efficient operation
2Reliability
If the turn-off time of synchronous rectifier transistors is extended to prevent current inversion, then reliability is improved, but power losses increase due to longer conduction of body diodes
Solution Approach 1:
The turn-off time is made dynamic rather than fixed, adjusting based on the calculated threshold that reflects real-time operating conditions including load current transients and parasitic inductance effects, optimizing the balance between reliability and efficiency
Solution Approach 2:
The system changes the turn-off timing parameter dynamically by calculating it based on voltage threshold comparisons, allowing optimal performance across varying load conditions without excessive power losses
Data Source
AI summary
A method of controlling synchronous rectification transistors in a switching converter includes sensing a drain-to-source voltage across each synchronous rectification transistor each switching half-cycle of the switching converter. An average of the sensed drain-to-source voltage is calculated for each synchronous rectification transistor over N prior switching half-cycles. A load current transient in the switching converter is sensed based on the sensed drain-to-source voltage of each synchronous rectification transistor and the calculated average of the sensed drain-to-source voltage for each synchronous rectification transistor over the N prior switching half-cycles.