Synchronous Rectifier FET Voltage Drop Reduction
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Solution Overview
Problem
Conventional full-wave bridge rectifiers in battery-powered mobile devices experience significant voltage drops due to junction diodes, leading to heat generation and inefficiency, especially at low voltages and varying load currents.
Innovation Solution
The use of synchronous rectification with FETs minimizes voltage drop by employing zero-crossing detection and body diodes for power control, replacing conventional diode bridges and incorporating buck switching regulators to optimize power transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional full-wave bridge rectifiers with junction diodes are used, then rectification function is achieved, but significant voltage drop (up to 1.4V) and heat generation occur
Solution Approach 1:
The patent changes the fundamental parameter of the rectifying element from junction diode to FET, transforming the conduction mechanism from PN junction forward bias to field effect transistor channel conduction. This parameter change reduces the voltage drop from approximately 0.7V per diode to a much lower value determined by FET on-resistance, directly addressing the energy loss and heat generation problems
Solution Approach 2:
The patent replaces the passive diode-based rectification mechanism with an active FET-based synchronous rectification system. This substitution introduces gate-controlled switching that actively manages current flow, replacing the passive voltage-drop-based rectification with an controlled low-resistance path, thereby reducing energy loss and heat generation
2Loss of energy
If synchronous rectification with FETs is used, then voltage drop is minimized and power loss reduced, but device complexity increases due to control circuitry requirements
Solution Approach 1:
The patent implements self-service through automatic body diode conduction during reverse voltage periods and self-driven gate control where the FET's own drain-source voltage controls the gate drive timing. The synchronous rectifier uses the input voltage waveform itself to control the switching, eliminating the need for external zero-crossing detection or complex control circuits
Solution Approach 2:
The patent merges the rectification function with the FET's inherent body diode function. During the negative half-cycle, the body diode automatically conducts to provide the rectification path, while during the positive half-cycle, the FET is turned on to provide the low-resistance path. This merging of functions eliminates the need for separate control circuitry for each phase
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power loss and heat generation, achieving more efficient power transfer and regulation, particularly at low voltages and lighter load currents, while maintaining efficient charging of batteries and other energy storage devices.
Implementation Method 1
a coil in the battery-powered mobile device can be used to inductively generate a sinusoidal signal
Implementation Method 2
Automatic conduction of a body diode of the selected one of the first and second FETs is permitted during a period when a respective gate of the selected one of the first and second FETs is held in a high-impedance state
Data Source
AI summary
A synchronous rectifier is arranged to rectify inductively coupled power using FETs (field effect transistors) to minimize the voltage drop of the rectifier, which minimizes power loss. Power loss is an important consideration in applications where fairly significant power is coupled to a device (such as a battery charger or other energy storage device) for a fairly short time (such as less than one hour) at a fairly low voltage (such as around 2.5 to 4.5 volts). Body diodes of the FETs can be used to supply power for bootstrapping and control logic for controlling the FETs.


