Synchronous Rectifier Offset Control for Zero Current Detection

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Solution Overview

Problem

Synchronous rectifiers in mobile applications face inefficiencies due to power losses in diodes and challenges in accurately determining the switching-off instant of NMOS transistors, leading to increased power consumption and reduced efficiency, especially in high-frequency operations.

Innovation Solution

A compensated zero detection circuit that includes an offset-controlled comparator and a charge pump to adjust the offset voltage, ensuring precise switching-off of the NMOS transistor when the inductor current reaches zero, minimizing diode conduction time and power losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a diode is used for recirculation current conduction, then the circuit structure is simple, but power losses are large due to forward voltage drop

Engineering Contradiction:
Improvecircuit structureVSAvoidpower losses
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent replaces the diode with an NMOS transistor that can dynamically change its on-resistance parameter. By controlling the gate voltage, the transistor transitions from high resistance (off state) to very low resistance (on state), replacing the fixed forward voltage drop characteristic of diodes with a controllable resistance that can be minimized through proper gating, thereby reducing power losses while maintaining circuit functionality

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If NMOS transistor switching timing is not precisely controlled, then the control circuit is simpler, but power consumption increases due to premature or delayed switching

Engineering Contradiction:
Improvecontrol circuitVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent implements a feedback mechanism using a comparator that continuously monitors the inductor current and provides feedback to the control logic. When the current reaches zero, the comparator triggers a signal to turn off the NMOS transistor, ensuring precise switching timing. This feedback loop eliminates the need for complex external timing circuits while achieving accurate power consumption management through current-based control

Inventive Principle:
Principle #23Feedback

3Device complexity

If zero current detection is performed without offset compensation, then the detection circuit is simpler, but switching precision deteriorates due to comparator propagation time and offset

Engineering Contradiction:
Improvedetection circuitVSAvoidswitching precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by introducing an offset voltage that anticipates and compensates for the comparator's propagation delay and offset errors. The offset is pre-calculated based on expected timing parameters and applied to the comparator input, ensuring that the zero-crossing detection occurs at the correct moment despite the inherent delays in the detection circuit, thereby maintaining high switching precision without requiring more complex detection hardware

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8013586B2Synchronous rectifier having precise on/off switching times
Publication Date: 2011.09.06 STMICROELECTRONICS INT NV
  • US8013586B2 patent drawing
  • US8013586B2 patent drawing
  • US8013586B2 patent drawing

AI summary

A synchronous rectifier, including an energy storage element having a terminal; a power supply input, connected to the terminal of the storage element in a first time interval; a reference line connected to the terminal of the storage element in a second time interval; and a zero comparator, coupled to the terminal of the storage element to detect a current flowing in the energy storage element and disconnect the terminal of the storage element from the reference line upon detecting a zero current, the zero comparator having an offset and a propagation time; the zero comparator further having an offset control input and an output. An offset regulating loop is coupled between the output of the zero comparator and the offset control input and regulates the offset of the zero comparator to compensate the propagation time.