Synchronous Rectifier Timing Circuit Prevents Cross Conduction

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Solution Overview

Problem

Conventional synchronous rectifiers in DC-DC converters experience cross conduction issues, leading to current spikes and inefficiencies, particularly at low output voltage levels, due to the limitations of self-driven and control-driven circuitry.

Innovation Solution

A timing control circuit is implemented to stagger pulse width modulated signals, preventing cross conduction by ensuring that the output and complementary output MOSFET switches operate with delayed drive voltages, thereby avoiding simultaneous switching and current spikes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If self-driven circuitry is used to control synchronous rectifiers, then the circuit complexity is reduced and MOSFET driving losses are minimized, but cross conduction occurs and the usable input voltage range is limited

Engineering Contradiction:
Improvecircuit complexityVSAvoidcross conduction prevention
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

A timing control circuit is introduced as an intermediary between the PWM controller and the MOSFET gates. This timing circuit receives the PWM signal and generates properly sequenced gate drive signals with appropriate dead time, preventing cross conduction while maintaining circuit simplicity. The timing circuit acts as a mediator that translates the basic PWM signal into the complex sequencing required for reliable synchronous rectification.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If control-driven techniques are used to control synchronous rectifiers, then cross conduction is prevented and constant gate drive voltage is achieved, but driving losses increase and additional parts are required

Engineering Contradiction:
Improvecross conduction preventionVSAvoidMOSFET driving losses
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The timing control circuit dynamically adjusts the timing parameters of the gate drive signals based on the PWM duty cycle. By changing the timing parameters (dead time, turn-on/turn-off sequences) rather than the voltage level itself, the circuit prevents cross conduction and adapts to different operating conditions without requiring additional power-consuming components. The parameter changes are achieved through RC time constants and logic gate delays rather than active driving circuits.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If conventional synchronous rectifiers operate at low output voltage levels, then efficiency improvement is critical, but cross conduction and current spikes occur due to simultaneous MOSFET switching

Engineering Contradiction:
Improvepower dissipation in rectification stageVSAvoidcurrent spikes
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The timing control circuit performs preliminary actions by generating dead time intervals before the MOSFETs switch states. The circuit anticipates potential cross conduction by holding both MOSFETs off during the transition period, then sequentially turning them on in the correct sequence. This preliminary timing control prevents the harmful current spikes that would occur if both MOSFETs switched simultaneously at low voltage levels.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7321498B2DC-DC converter having synchronous rectification without cross conduction
Publication Date: 2008.01.22 HONEYWELL INTERNATIONAL INC
  • US7321498B2 patent drawing
  • US7321498B2 patent drawing
  • US7321498B2 patent drawing

AI summary

An apparatus (54) is provided for preventing cross conduction in a synchronous rectifier of a DC-DC converter (10). The DC-DC converter has an input MOSFET switch (26) coupled to primary windings (22) of an isolation transformer (20), an output MOSFET switch (30) coupled to secondary windings (24) of the isolation transformer, and a complementary output MOSFET switch (34) coupled to an output terminal (14). A synchronous rectifier timing circuit (54) comprises a first timing output signal circuit (62) responsive to a pulse width modulated signal for providing first and second timing output signals (55, 56) that switches low at time t1 and high at time t4 to control the input MOSFET switch and output MOSFET switch, respectively, and a second timing output signal circuit (64) responsive to the pulse width modulated signal for providing a third timing output signal (58) that switches high at time t2 and low at time t3 to control the complementary output MOSFET switch.