Synchronous Spread-Spectrum Transceiver for EMI-Safe Data Timing
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Solution Overview
Problem
Conventional spread spectrum clock signals lead to uncontrollable data signal phase relationships in the time domain, making it difficult to drive high-data-rate transceivers and resulting in strong electromagnetic interference (EMI), which is undesirable due to weight and cost issues with external shielding.
Innovation Solution
A digital transceiver is designed with a clock generator producing a first clock signal of fixed frequency, an inverter generating an inverted clock signal, and a frequency detector to determine a frequency control word for a digitally-controlled oscillator, producing a second clock signal with time-average frequency synchronous to the first, with a boundary spread, allowing the receiver to receive data securely.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional spread spectrum clock signal is used for driving data transmission, then EMI is reduced through spectrum spreading, but data signal phase relationship becomes uncontrollable leading to insecure data transmission
Solution Approach 1:
The patent implements a feedback mechanism where the receiver detects the phase relationship between received data and local clock signal, then feeds back phase correction information to the transmitter. This allows the system to maintain spread spectrum EMI reduction while dynamically correcting phase alignment issues to ensure secure data transmission.
Solution Approach 2:
The system dynamically adjusts clock signal parameters including phase offset and frequency deviation within the spread spectrum range. By changing these parameters based on detected data alignment requirements, the system maintains both EMI reduction benefits and controllable phase relationships for secure transmission.
2Productivity
If transceiver operates at ultra-high frequency (>100MHz) for high data rate transmission, then productivity is improved, but EMI becomes strong requiring external shielding which increases weight and cost
Solution Approach 1:
The patent employs periodic modulation of the clock signal spectrum, spreading the ultra-high frequency data transmission energy across a broader frequency range through periodic phase and frequency variations. This periodic spreading reduces peak EMI emissions while maintaining high data transmission rates through the spread spectrum signal structure.
Solution Approach 2:
The system converts the potentially harmful concentrated EMI from ultra-high frequency operation into a beneficial distributed spectrum signal. By intentionally spreading the spectrum, the strong narrowband EMI is transformed into a weaker wideband signal that covers a broader frequency range, reducing interference while maintaining transmission integrity.
3Object-affected harmful factors
If spread spectrum clock signal is used, then EMI is reduced, but clock domain signal crossing and data alignment issues arise increasing device complexity
Solution Approach 1:
The patent introduces an intermediary phase detection and alignment circuit that mediates between the spread spectrum clock domain and data signal domains. This intermediary component detects phase relationships and generates alignment control signals, simplifying the overall circuit design by providing a systematic method to handle clock domain crossing and data alignment issues.
Data Source
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AI summary
A digital transceiver is provided. The digital transceiver includes a clock generator configured to generate a first clock signal having a first frequency of a fixed value and a transmitter driven by the first clock signal of the first frequency to transmit data. Additionally, the digital transceiver includes an inverter coupled to the clock generator to generate an inverted first clock signal of the first frequency. Further, it includes a frequency detector configured to compare the first frequency with a second frequency of a feedback signal in a loop of feedback to determine a frequency control word F. Furthermore, it includes a digitally-controlled oscillator driven by the frequency control word F in the loop of feedback to output a second clock signal with a time-average frequency substantially synchronous to the first frequency with a boundary spread and a receiver driven by the second clock signal to receive the data.