Syndrome Decoder Circuit for High-Speed ECC Failure Detection
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Solution Overview
Problem
As data transmission speeds in semiconductor devices increase, so does the probability of errors occurring, necessitating improved reliability through novel design schemes for error detection and correction.
Innovation Solution
The electronic device incorporates a syndrome decoder, error insertion control circuit, and failure detection circuit to generate and compare error insertion codes and syndromes, ensuring reliable data transmission by inserting and detecting errors within internal codewords.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data transmission speed is increased, then productivity is improved, but reliability deteriorates due to higher error probability
Solution Approach 1:
The patent applies preliminary action by generating error insertion codes during the write operation phase, before actual data transmission occurs. The syndrome decoder pre-processes write syndromes to create error insertion codes that will be used during read operations to deliberately introduce errors for testing purposes. This preliminary preparation enables the system to proactively test error correction capabilities without waiting for actual transmission errors to occur.
Solution Approach 2:
The patent implements feedback through the failure detection circuit that compares write syndromes with read syndromes. When discrepancies are detected between the expected syndrome (from write operation) and the actual syndrome (from read operation after error insertion), the system generates failure detection signals that feedback to indicate whether the error correction mechanism is functioning properly. This closed-loop feedback ensures continuous verification of error correction reliability.
2Reliability
If error detection and correction mechanisms are added, then reliability is improved, but device complexity increases
Solution Approach 1:
The syndrome decoder serves multiple functions: it decodes write syndromes to generate error insertion codes for testing purposes, and also processes read syndromes for actual error correction during data retrieval. The failure detection circuit similarly performs dual roles by comparing syndromes to detect failures while also verifying error correction effectiveness. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity.
Solution Approach 2:
The error correction system performs self-service through the self-test mechanism where errors are deliberately inserted into codewords and then automatically detected and corrected by the same error correction circuitry. The system tests its own error correction capabilities without requiring external testing equipment or additional complex verification systems. The failure detection circuit autonomously monitors the health of the error correction mechanism by comparing syndromes and generating appropriate failure signals.
Data Source
AI summary
An electronic device includes a syndrome decoder, an error insertion control circuit, and a failure detection circuit. The syndrome decoder generates an error insertion code from a write syndrome generated based on a write pulse. The error insertion control circuit inserts an error into an internal codeword according to the error insertion code based on a read pulse. The failure detection circuit compares the write syndrome with a read syndrome generated from the internal codeword to generate a failure detection signal.