Resistive Memory ECC Correction Using Syndrome-Selected Weak-Bit Inversion
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Solution Overview
Problem
Resistive memories, particularly 1T1R and 2T2R types, face high error rates due to manufacturing variability and relaxation phenomena, leading to incorrect state transitions between High Resistance State (HRS) and Low Resistance State (LRS), which complicates error correction in these memories.
Innovation Solution
The proposed solution involves a process that selects between two decoding options based on the syndrome value: one decoding without Weak-bit inversion and another with Weak-bit reversal. This process identifies Weak-bits, which are bits likely to be erroneous, and uses this information to improve error correction by potentially reversing these bits during decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ECC decoding is used without weak-bit inversion, then the decoding process is simple and fast, but the error correction capacity is limited and cannot handle high error rates in resistive memories
Solution Approach 1:
The decoding process dynamically adapts based on the syndrome value. When the syndrome indicates a correctable error pattern, conventional decoding is used. When the syndrome indicates an uncorrectable error or ambiguous error pattern, the system dynamically switches to weak-bit inversion decoding, making the decoding process flexible and adaptive to different error conditions
Solution Approach 2:
The system changes the decoding parameter (whether to invert weak-bits) based on the syndrome value. This parameter change allows the same hardware to perform different decoding strategies without requiring separate dedicated circuits for each decoding mode, thus improving error correction capacity while controlling complexity
2Reliability
If weak-bit identification and inversion is always performed, then error correction capacity is maximized, but the number of operations and processing time increase
Solution Approach 1:
Instead of always performing weak-bit inversion, the system performs it partially - only when the syndrome value indicates that conventional decoding failed or was ambiguous. This partial application of weak-bit inversion maintains high error correction capacity while avoiding unnecessary processing time for cases where conventional decoding suffices
Solution Approach 2:
The system performs preliminary syndrome analysis before deciding whether to perform weak-bit inversion. This preliminary check allows the system to quickly determine if conventional decoding is sufficient, avoiding the time-consuming weak-bit inversion process when it is not needed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the error correction capacity of resistive memories by identifying and addressing Weak-bits, thereby reducing the overall error rate without increasing the number of verification bits or incurring additional costs.
Implementation Method 1
An RRAM memory cell has at least one resistive element whose conductance can be modified. Typically, an RRAM memory cell in its initial state has an insulating metal structure and is in a high resistance state (HRS). Applying an external high voltage pulse across the RRAM cell allows the formation of conductive paths in the switching layer and the RRAM cell is switched to a low resistance state (LRS).
Implementation Method 2
Applying an external high voltage pulse across the RRAM cell allows the formation of conductive paths in the switching layer and the RRAM cell is switched to a low resistance state (LRS). The general process of this breakdown of the cell's insulating structure is generally referred to as 'electroforming' (or 'forming' in English terminology).
Data Source
Figure 1a~1b
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AI summary
The invention relates to a device and a method for reading a codeword from an ECC-protected resistive memory where each memory cell comprises resistive devices for storing one bit of a codeword. The method (700) allows selection (740, 750), based on the value of a syndrome, of a corrected codeword after a first decoding (720) without weak-bit inversion, or a corrected codeword after a second decoding (730) with weak-bit inversion. If the calculated syndrome determines that the first decoding revealed an uncorrectable error, or determines that the second decoding revealed neither an uncorrectable error nor an n-error (i.e., a maximum of n erroneous bits per codeword), the selected codeword is the corrected codeword with weak-bit inversion. Otherwise, the selected codeword is the corrected codeword without weak-bit inversion.