Frequency Synthesizer Cycle Slip Prevention Using Digital Phase Correction
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Solution Overview
Problem
Frequency synthesizers experience cycle slipping due to phase errors exceeding 360 degrees, leading to increased frequency acquisition time and requiring additional analog circuitry, which increases cost and complexity.
Innovation Solution
A digital circuitry-based system that determines phase errors and cycle slips, modifying the VCO divisor to reduce phase errors to less than one cycle, maintaining charge pump gain and preventing cycle slipping without additional analog hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If analog circuitry is added to prevent cycle slips, then frequency acquisition time is reduced, but device complexity and cost increase
Solution Approach 1:
The patent replaces analog circuitry with a digital solution using a state machine and digital logic circuits to detect and correct cycle slips. The state machine monitors the phase frequency detector output and controls the charge pump current cells digitally, eliminating the need for complex analog circuitry while achieving the same cycle slip prevention function.
Solution Approach 2:
The patent creates a digital model of the phase detection and correction process through the state machine, which replicates the functionality of analog cycle slip prevention circuitry using digital states and transitions. This digital copy achieves the same protective function with simpler, more integrated circuitry.
2Reliability
If the linear range of the PFD is increased by adding charge pump cells, then cycle slip prevention is improved, but parasitic capacitance increases limiting upper frequency operation
Solution Approach 1:
The patent dynamically controls the charge pump current cells based on the detected phase error and cycle slip conditions. The state machine activates or deactivates specific current cells depending on the operational state, allowing the system to adapt the charge pump current dynamically rather than maintaining a fixed high current, thus reducing parasitic capacitance effects at high frequencies.
Solution Approach 2:
The patent changes the operational parameters of the charge pump by selectively activating different current cells based on the phase error magnitude and direction. This parameter adjustment allows optimal performance across different frequency ranges without the constant presence of additional parasitic capacitance from unused circuit elements.
3Device complexity
If digital circuitry is used instead of analog methods, then cost and complexity are reduced, but frequency switching time increases
Solution Approach 1:
The state machine is pre-configured with state transition tables that define the optimal sequence of charge pump cell activations for correcting cycle slips. This preliminary programming of correction sequences allows the digital circuitry to respond rapidly to detected errors without requiring complex real-time calculations, thus reducing frequency switching time while maintaining simplicity.
Solution Approach 2:
The patent implements a feedback loop where the state machine continuously monitors the phase frequency detector output and adjusts the charge pump current cell activation accordingly. This closed-loop control enables the digital circuitry to rapidly converge on the correct frequency by making incremental adjustments based on real-time feedback, reducing overall frequency switching time.
Data Source
AI summary
An improved method of cycle slip prevention in a frequency synthesizer is achieved by determining phase error between a divided VCO and reference, determining whether a phase error of a full cycle slip has occurred and in which direction and altering the phase of the VCO divided signal in the amount and direction to reduce the phase error to less than one reference cycle. The result is an improved transfer function of the PFD, proportional to the phase error in the region −2*pi to 2*pi, and fixed close to maximum when the phase error exceeds the above interval. This invention is achieved with the addition of digital circuitry to monitor and control the PFD and the VCO divider, and does not require additional analog charge pump circuitry.