Frequency Synthesizer Power-Down While Preserving Phase Coherency
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Solution Overview
Problem
Frequency synthesizer circuits in wireless devices consume excessive power, especially in idle periods, due to continuous operation, which affects battery life without effectively managing power-down states to maintain phase coherency.
Innovation Solution
A frequency-generating circuit with a controller that generates a power-down control signal to shut down parts of the frequency synthesizer circuit during idle periods, while maintaining the accumulator's accumulated value to preserve phase information, allowing for seamless resumption without phase incoherence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the frequency synthesizer circuit operates continuously to maintain phase coherency, then phase coherency is preserved, but power consumption increases
Solution Approach 1:
The frequency synthesizer circuit is divided into multiple independent modules: accumulator module, phase detector module, charge pump module, and voltage-controlled oscillator module. During power-down, only the accumulator module remains active while other modules are powered off, enabling selective operation of circuit segments to maintain phase information without continuous full-circuit operation.
Solution Approach 2:
The accumulator module pre-calculates and stores phase information (accumulated value) before the frequency synthesizer enters power-down mode. This preliminary accumulation of phase data allows the circuit to resume operation quickly without losing phase coherency, eliminating the need for continuous operation during idle periods.
2Use of energy by moving object
If the frequency synthesizer circuit powers down to reduce power consumption, then power consumption decreases, but phase information is lost
Solution Approach 1:
The phase information is extracted from the complete frequency synthesizer circuit and isolated into a dedicated accumulator module. This separated accumulator can maintain phase information independently during power-down of the main circuit, allowing the bulk of the circuit to be powered off while preserving critical phase data in the extracted accumulator component.
Solution Approach 2:
The operating state of different circuit modules is dynamically changed: the accumulator module maintains a low-power standby state with preserved accumulated value, while the phase detector, charge pump, and VCO modules transition to a complete power-off state. This parameter change in operational state enables differential power management across circuit components.
3Measurement precision
If the accumulated value is reset during power-down to clear stale data, then data accuracy is improved, but phase coherency is broken
Solution Approach 1:
The accumulator module maintains continuous operation in a low-power standby mode during idle periods, continuously preserving the accumulated phase value without interruption. This continuous maintenance of the accumulated value ensures unbroken phase coherency across power cycles, while the low-power state prevents data staleness through selective non-operation of other circuit modules.
Data Source
AI summary
A frequency-generating circuit includes a frequency synthesizer circuit and a controller. The frequency synthesizer circuit generates a radio-frequency clock signal according to a reference clock signal and a channel number. The controller is coupled to the frequency synthesizer circuit, generates a power-down control signal for controlling at least a portion of the frequency synthesizer circuit to power down. The frequency synthesizer circuit includes an accumulator for generating an accumulated value according to the channel number. The frequency synthesizer circuit generates the radio-frequency clock signal according to the reference clock signal and the accumulated value. The controller maintains the accumulated value of the accumulator when the portion of the frequency synthesizer circuit powers down.