Synthesizing Printf Statements for RTL Debugging in High-Level Synthesis
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Solution Overview
Problem
Debugging RTL code generated during High-Level Synthesis is challenging due to the RTL generator's ignorance of printf and scanf statements, making it impossible to observe execution flow and values during runtime.
Innovation Solution
A method and system that synthesize printf and scanf statements by converting them into RTL instructions, allowing them to interact with FPGA memory, transmit debug messages via DMA to host memory, and write them to a file system for display, enabling the observation of execution flow and parameter values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If printf and scanf statements are used in MPL code for debugging, then debugging capability is improved, but the RTL generator ignores these statements making debugging impossible at runtime
Solution Approach 1:
The patent introduces an intermediary buffer memory structure that mediates between the RTL code execution and the debug output system. The printf/scanf statements are translated to write to this buffer, which then gets read by a debug message reader that transmits messages to the host. This intermediary buffer allows debug statements to function in RTL without direct interference with the synthesis process.
Solution Approach 2:
The patent changes the parameter representation of debug statements by translating high-level printf/scanf calls into RTL-compatible buffer write operations. The debug messages are stored as parameter values in a structured buffer format, allowing the debug functionality to operate within the constraints of RTL synthesis while maintaining the original debugging intent.
2Reliability
If debug statements are synthesized into RTL instructions, then runtime debugging is enabled, but device complexity increases
Solution Approach 1:
The patent segments the debugging system into distinct functional modules: a buffer memory for storing debug messages, a write mechanism for capturing RTL execution data, a debug message reader for retrieving messages, and a transmission interface for communicating with the host. This segmentation allows each component to be independently optimized and managed, reducing overall system complexity.
Solution Approach 2:
The patent creates a simplified copy of the standard I/O buffer mechanism specifically for debug purposes. Instead of implementing full printf/scanf functionality in RTL, it creates a buffer structure that mirrors the essential functionality needed for debugging, thereby reducing complexity while maintaining effectiveness.
3Loss of information
If debug messages are transmitted via DMA to host memory, then debugging information availability is improved, but loss of time occurs during transmission
Solution Approach 1:
The patent implements periodic or event-triggered transmission of debug messages from the buffer to the host via DMA. Instead of continuous transmission, messages are transferred in periodic batches or when specific conditions are met, reducing the time overhead while ensuring debug information remains available for analysis.
Data Source
AI summary
High level synthesis (HLS) begins with high-level specification of a problem, where behavior is generally decoupled from e.g., clock-level timing. Programming code can be run and debugged during functional simulation using debugging techniques. However, it is not possible to understand execution flow of register transfer level instructions (RTL) generated during RTL debug. Conventionally, it is challenging and not possible due to nature of debugging techniques which ignore printf statements in code for invocation. Systems and methods of present disclosure synthesize printf and/or scanf statements for generating debug messages in HLS code, wherein printf and/or scanf statements is/are included before/after function(s) in sections comprising instructions in code and synthesized as a block during run-time which communicate with host system and debug messages are generated for display on screen. This enables traceability of the code execution on the screen and printf/scanf statements output can be observed without any challenges.