Synthetic Gaussian Variables for Variation-Aware Library Data

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Solution Overview

Problem

Current static timing analysis tools cannot accurately model device mismatch variations at the transistor level due to the complexity of independent variation parameters, leading to inaccurate characterization and pessimism, especially in short paths with large cells.

Innovation Solution

The use of synthetic Gaussian variables to represent mismatch variations across devices, allowing for the derivation of timing property distributions and the generation of variation-aware library data through sensitivity analysis and Monte Carlo sampling, which reduces the complexity of modeling and mitigates pessimism.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If device mismatch variations are modeled with each device varying independently at transistor level, then modeling accuracy is improved, but library data size and characterization complexity become unmanageable

Engineering Contradiction:
Improvemodeling accuracyVSAvoidcharacterization complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple independent device-level mismatch parameters into a smaller set of cell-level variation parameters. By combining the variation sources from multiple transistors within a cell, the model maintains accuracy while reducing the number of parameters that need to be characterized and stored in library data.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates universal cell-level variation parameters that can represent the combined effect of multiple device-level mismatches. These universal parameters serve multiple functions: they capture the essential variation behavior, reduce library data size, and work across different cell types and technologies.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If all device mismatch variations are treated as fully correlated within a cell, then characterization complexity is reduced, but modeling accuracy deteriorates with non-trivial pessimism

Engineering Contradiction:
Improvecharacterization complexityVSAvoidmodeling accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies local quality by allowing different correlation structures for different cells based on their specific characteristics. Rather than forcing all cells to use the same correlation model, the approach adapts the variation modeling to the local properties of each cell type, improving accuracy while managing complexity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter representation from fully correlated device-level parameters to partially correlated cell-level parameters. This parameter transformation reduces the number of parameters while maintaining the essential variation behavior, striking a balance between accuracy and complexity.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If transistor-level behavior is modeled at cell level to reduce complexity, then characterization becomes simpler, but inaccuracy and pessimism are introduced

Engineering Contradiction:
Improvemodeling complexityVSAvoidmodeling accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent creates a simplified copy of the transistor-level variation behavior at the cell level. By deriving cell-level parameters that replicate the essential statistical properties of multiple transistor variations, the model achieves computational efficiency while maintaining accuracy through careful preservation of the underlying variation characteristics.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8204730B2Generating variation-aware library data with efficient device mismatch characterization
Publication Date: 2012.06.19 SYNOPSYS INC
  • US8204730B2 patent drawing
  • US8204730B2 patent drawing
  • US8204730B2 patent drawing

AI summary

In a method of generating variation-aware library data for statistical static timing analysis (SSTA), a “synthetic” Gaussian variable can be used to represent all instances of one or more mismatch variations in all devices (e.g. transistors), thereby capturing the effect on at least one timing property (e.g. delay or slew). By modeling device mismatch with synthetic random variables, the variation behavior (in terms of the distribution of delay, slew, constraint, etc.) can be interpreted as the outcomes of process variations instead of modeling the variation sources (e.g. transistor shape variations, variations in dopant atom density, and irregularity of edges).