Synthetic Partitioning for Multicore Architecture Mapping
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Solution Overview
Problem
Existing programming technologies face challenges in efficiently exploiting the capabilities of various execution platform architectures, particularly in parallel processing, due to the use of programming language-based abstractions that lead to top-down, reductionist models, making it difficult to map implementation-neutral specifications to arbitrary platforms while leveraging high capability features.
Innovation Solution
The introduction of synthetic partitions allows for the incremental incorporation of design features like parallelization into the logical architecture without immediate commitment to programming language constructs, deferring low-level details until later in the generation process, using frameworks with skeletal routines and domain-specific semantics to guide the mapping of logical architecture elements into implementation structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If programming language-based abstractions are used to represent evolving programs, then the program structure can be specified at high level, but it becomes difficult to map to arbitrary execution platforms and exploit high capability features
Solution Approach 1:
The patent introduces an intermediary representation layer between high-level programming language abstractions and execution platform specifics. This intermediary uses abstract partition constraints that are platform-independent, allowing programs to be specified at high level while maintaining adaptability to various execution platforms through the intermediate partitioning representation.
Solution Approach 2:
The patent segments the program representation into distinct layers: high-level programming language abstractions, intermediate partition constraints, and platform-specific implementation details. This segmentation allows each layer to be developed and optimized independently, resolving the contradiction between ease of high-level specification and platform adaptability.
2Productivity
If design features like parallelization are incorporated early into logical architecture, then the target program can exploit high capability features, but programming language details become overly complex
Solution Approach 1:
The patent applies preliminary action by incorporating design features like parallelization into the logical architecture at an early stage through partition constraints, before full programming language implementation details are finalized. This allows high capability features to be exploited while managing complexity through staged development.
Solution Approach 2:
The patent adds a temporal dimension to the design process by introducing staged incorporation of design features. Partition constraints are established in early stages, and programming language details are added in later stages, allowing productivity improvements without immediate complexity burdens.
3Reliability
If programming language constructs are committed to immediately, then the implementation is concrete and complete, but flexibility to explore varied implementation forms is lost
Solution Approach 1:
The patent makes the implementation representation dynamic by allowing partition constraints to evolve from abstract to concrete over time. The system can transition between different levels of specificity, maintaining reliability through constraint satisfaction while preserving flexibility through reversible refinement.
Solution Approach 2:
The patent uses parameter changes to control the level of abstraction in implementation representation. By adjusting parameters such as partition granularity and constraint specificity, the system can shift between flexible early-stage design and concrete late-stage implementation, maintaining both reliability and adaptability.
Data Source
AI summary
A method and a system for using synthetic partitioning constraints to impose design patterns containing desired design features (e.g., distributed logic for a threaded, multicore based computation) onto logical architectures (LA) specifying an implementation neutral computation. The LA comprises computational specifications and related logical constraints (i.e., defined by logical assertions) that specify provisional loops and provisional partitionings of those loops. The LA contains virtually no programming language constructs. Synthetic partitioning constraints add implementation specific design patterns. They define how to find frameworks with desired design features, how to reorganize the LA to accommodate the frameworks, and how to map the computational payload from the LA into the frameworks. The advantage of synthetic partitioning constraints is they allow implementation neutral computations to be transformed into custom implementations that exploit the high capability features of arbitrary execution platform architectures such as multicore, vector, GPU, FPGA, virtual, API-based and others.


