SysPort Format Bit Allocation for Stacking Scalability

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Solution Overview

Problem

In stacking systems, the limited number of unit IDs available restricts the ability to stack member devices with varying port densities, as the existing SysPort format does not efficiently allocate unit IDs to multi-core chips, leading to insufficient IDs for proper port identification and aggregation.

Innovation Solution

The method involves generating system port identities by allocating unit IDs differently across chips, allowing for a SysPort format with fewer bits for port IDs and more bits for unit IDs, enabling more unit IDs to be supported, thus allowing for the stacking of devices with diverse port densities by dividing non-aggregated ports into groups and using multiple unit IDs for each core.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the SysPort format uses a fixed number of bits for unit IDs and port IDs, then the system maintains simplicity in port identification, but the number of available unit IDs becomes insufficient when stacking member devices with varying port densities

Engineering Contradiction:
Improvenumber of unit IDsVSAvoidSysPort format complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the bit allocation for unit IDs and port IDs flexible rather than fixed. The system dynamically adjusts the number of bits allocated to unit IDs versus port IDs based on the actual stacking requirements and port density of member devices. This allows the SysPort format to adapt to different scenarios: when more member devices need to be stacked, more bits are allocated to unit IDs; when more ports need to be identified within a device, more bits are allocated to port IDs.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the SysPort format allocates more bits to port IDs to support higher port density, then individual devices can have more ports identified, but fewer unit IDs are available for stacking more member devices

Engineering Contradiction:
Improveport density supportVSAvoidnumber of unit IDs
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent applies parameter changes by modifying the bit allocation parameters of the SysPort format. Instead of using a static allocation, the system changes the parameters (number of bits for unit IDs versus port IDs) based on the configuration requirements. This allows the same SysPort format to support both high port density scenarios and high device count scenarios by adjusting the bit allocation parameters accordingly.

Inventive Principle:
Principle #35Parameter changes

3Stability of the object's composition

If the system uses a unified SysPort format for all member devices, then the system maintains consistency in port identification, but it cannot efficiently accommodate member devices with different port densities

Engineering Contradiction:
ImproveSysPort format consistencyVSAvoidsupport for diverse port densities
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent applies universality by designing a SysPort format that serves multiple functions through flexible bit allocation. The same basic SysPort structure is used universally across all member devices, maintaining consistency. However, the bit allocation within this universal format can be configured differently to accommodate various port densities, making the system both consistent and adaptable.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10574625B2Generating system port identity
Publication Date: 2020.02.25 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10574625B2 patent drawing
  • US10574625B2 patent drawing
  • US10574625B2 patent drawing

AI summary

Various examples provide a method and apparatus of generating a system port identity. According to the method, a member device may determine a value c which is the number of unit IDs to be allocated to a chip in an interface board of the member device, c is larger than 1; generate a system port identity which identifies a port in the stack for each of plural first ports of the chip using a first unit ID of the c unit IDs; generate a system port identity for each of plural second ports of the chip other than the first ports using a second unit ID of the c unit IDs.