System Cache Fine Grain Power Management

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Solution Overview

Problem

Conventional caches are inefficient in storing data accessed multiple times with widely spaced access times, leading to increased power consumption in mobile devices due to frequent off-chip memory access, as they are not designed to retain data that is accessed non-temporally local.

Innovation Solution

A system cache is divided into multiple sections with independently controlled power supply, where inactive sections are powered at a lower voltage for retention and increased to a higher voltage before access, and requests are grouped and accessed in bursts to reduce leakage power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is retained in conventional cache based on temporal locality, then frequently accessed data can be quickly retrieved, but data accessed multiple times with widely spaced access times cannot be retained and gets evicted

Engineering Contradiction:
Improvedata retention capabilityVSAvoidaccess pattern compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The cache system dynamically adjusts its retention behavior based on the access pattern. For temporally local accesses, conventional LRU replacement is used. For widely spaced accesses, the system detects this pattern and switches to a retention mode that keeps data in cache despite long idle periods, adapting the replacement policy to match the observed access behavior.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The cache changes operational parameters based on access patterns. When widely spaced accesses are detected, the system modifies replacement thresholds and retention criteria to preserve data that exhibits this pattern, rather than using fixed temporal locality rules. This parameter adaptation allows the cache to handle both temporal and non-temporal access patterns effectively.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If off-chip memory is accessed frequently to retrieve data, then data can be obtained, but power consumption increases and battery life is limited

Engineering Contradiction:
Improvedata availabilityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary actions by pre-loading data into the cache based on access pattern detection. When data with widely spaced access patterns is identified, it is retained in the cache in advance of future access needs, eliminating the need for power-consuming off-chip memory accesses when the data is needed again.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cache system serves itself by automatically detecting access patterns and making intelligent retention decisions without requiring external intervention. The system monitors its own usage patterns and adjusts its behavior to retain data that will be needed, thereby reducing power consumption from off-chip accesses autonomously.

Inventive Principle:
Principle #25Self-service

3Productivity

If the system cache stores data for multiple agents with different access patterns, then data reuse can occur, but the cache cannot determine which lines will be reused without agent input

Engineering Contradiction:
Improvedata reuse efficiencyVSAvoidcache management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements feedback mechanisms where agents provide access pattern information to the cache controller. This feedback loop allows the cache to learn which data lines are likely to be reused and adjust its retention policy accordingly. The agents essentially guide the cache on what to retain, reducing the complexity of autonomous pattern detection while maintaining high data reuse efficiency.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8977817B2System cache with fine grain power management
Publication Date: 2015.03.10 APPLE INC
  • US8977817B2 patent drawing
  • US8977817B2 patent drawing
  • US8977817B2 patent drawing

AI summary

Methods and apparatuses for reducing leakage power in a system cache within a memory controller. The system cache is divided into multiple small sections, and each section is supplied with power from a separately controllable power supply. When a section is not being accessed, the voltage supplied to the section is reduced to a voltage sufficient for retention of data but not for access. Incoming requests are grouped together based on which section of the system cache they target. When enough requests that target a given section have accumulated, the voltage supplied to the given section is increased to a voltage sufficient for access. Then, once the given section has enough time to ramp-up and stabilize at the higher voltage, the waiting requests may access the given section in a burst of operations.